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Tue, 6 Apr 2021 09:38:32 +0000 From: Al Grant To: "leo.yan@linaro.org" , Arnaldo Carvalho de Melo , John Garry , Will Deacon , Mathieu Poirier , James Clark , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , Adrian Hunter , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" CC: "leo.yan@linaro.org" Subject: RE: [PATCH v2 0/7] perf arm-spe: Enable timestamp Thread-Topic: [PATCH v2 0/7] perf arm-spe: Enable timestamp Thread-Index: AQHXKFpYNmFc4ZHFWkChYgZy5NQMtaqnPijA Date: Tue, 6 Apr 2021 09:38:32 +0000 Message-ID: References: <20210403072346.30430-1-leo.yan@linaro.org> In-Reply-To: <20210403072346.30430-1-leo.yan@linaro.org> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ts-tracking-id: 5884BD795B75F94AAE13EDCA3CC48E80.0 x-checkrecipientchecked: true Authentication-Results-Original: linaro.org; dkim=none (message not signed) header.d=none;linaro.org; dmarc=none action=none header.from=arm.com; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Apr 2021 09:38:45.4178 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e367f87d-abb3-4e35-1315-08d8f8dfc5e2 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DB5EUR03FT023.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM6PR08MB3830 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > -----Original Message----- > From: Leo Yan > Sent: 03 April 2021 08:24 > To: Arnaldo Carvalho de Melo ; John Garry > ; Will Deacon ; Mathieu Poirier > ; James Clark ; Al Grant > ; Peter Zijlstra ; Ingo Molnar > ; Mark Rutland ; Alexander > Shishkin ; Jiri Olsa ; > Namhyung Kim ; Adrian Hunter > ; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org > Cc: leo.yan@linaro.org > Subject: [PATCH v2 0/7] perf arm-spe: Enable timestamp >=20 > As we know, the timestamp is important for AUX trace; it's mainly used to > correlate between perf events and AUX trace, allows to generate events wi= th > time ordered manner. There have several good examples of enabling timest= amp > for AUX trace (like Intel-pt, Intel-bts, etc). >=20 > Since the conversion between TSC and kernel timestamp has been supported = on > Arm64, TSC is a naming convention from x86, but perf now has reused it to > support Arm arch timer counter. >=20 > This patch set is to enable timestamp for Arm SPE trace. It reads out TS= C > parameters from mmap page and stores into auxtrace info structure; Why not synthesize a PERF_RECORD_TIME_CONV - isn't that specifically to capture the TSC parameters from the mmap page? If a generic mechanism exists it would be better to use it, otherwise we'll have to do this again = for future trace formats. perf_read_tsc_conversion and perf_event__synth_time_conv are currently in arch/x86/util/tsc.c, but nothing in them is x86-specific and they could = be moved somewhere more generic. Al > the TSC > parameters are used for conversion between timer counter and kernel time = and > which is applied for Arm SPE samples. >=20 > This patch set can be clearly applied on perf/core branch with: >=20 > commit 6859bc0e78c6 ("perf stat: Improve readability of shadow stats") >=20 > Ths patch series has been tested on Hisilicon D06 platform. >=20 > After: >=20 > # perf script -F comm,time,cpu,pid,dso,ip,sym >=20 > perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event= _exec > ([kernel.kallsyms]) > perf 2408 [032] 168.680297: ffffbd1253690a3c perf_event= _exec > ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680317: ffffbd1253683f50 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680319: ffffbd1253683f70 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680367: ffffbd12539b03ec > __arch_clear_user ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 > kmem_cache_alloc ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 > kmem_cache_alloc ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 > kmem_cache_alloc ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680375: ffffbd1253721440 > kmem_cache_alloc ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) > false_sharing.e 2408 [032] 168.680376: ffffbd1253683f70 > perf_iterate_ctx.constprop.0 ([kernel.kallsyms]) >=20 > Changes from v1: > * Rebased patch series on the latest perf/core branch; > * Fixed the patch for dumping TSC parameters to support both the > older and new auxtrace info format. >=20 >=20 > Leo Yan (7): > perf arm-spe: Remove unused enum value ARM_SPE_PER_CPU_MMAPS > perf arm-spe: Store TSC parameters in auxtrace info > perf arm-spe: Dump TSC parameters > perf arm-spe: Convert event kernel time to counter value > perf arm-spe: Assign kernel time to synthesized event > perf arm-spe: Bail out if the trace is later than perf event > perf arm-spe: Don't wait for PERF_RECORD_EXIT event >=20 > tools/perf/arch/arm64/util/arm-spe.c | 23 +++++++ > tools/perf/util/arm-spe.c | 89 +++++++++++++++++++++++----- > tools/perf/util/arm-spe.h | 7 ++- > 3 files changed, 103 insertions(+), 16 deletions(-) >=20 > -- > 2.25.1