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Tue, 6 Apr 2021 11:33:14 +0000 From: Clark Wang To: aisheng.dong@nxp.com, robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, festevam@gmail.com Cc: kernel@pengutronix.de, linux-imx@nxp.com, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH V2 05/18] ARM64: dts: imx8: add the missing lpi2c ipg clock Date: Tue, 6 Apr 2021 19:32:53 +0800 Message-Id: <20210406113306.2633595-6-xiaoning.wang@nxp.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210406113306.2633595-1-xiaoning.wang@nxp.com> References: <20210406113306.2633595-1-xiaoning.wang@nxp.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [119.31.174.71] X-ClientProxiedBy: HK2PR0401CA0010.apcprd04.prod.outlook.com (2603:1096:202:2::20) To AM6PR04MB5623.eurprd04.prod.outlook.com (2603:10a6:20b:a9::13) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.71) by HK2PR0401CA0010.apcprd04.prod.outlook.com (2603:1096:202:2::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3999.27 via Frontend Transport; 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So add the ipg clock here for all lpi2c nodes. Signed-off-by: Clark Wang --- V2 changes: - New patch added in V2 --- .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 24 ++++++++++++------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 960a802b8b6e..b5ed12a06538 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -111,8 +111,10 @@ uart3_lpcg: clock-controller@5a490000 { i2c0: i2c@5a800000 { reg = <0x5a800000 0x4000>; interrupts = ; - clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c0_lpcg IMX_LPCG_CLK_0>, + <&i2c0_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_0 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_0>; @@ -122,8 +124,10 @@ i2c0: i2c@5a800000 { i2c1: i2c@5a810000 { reg = <0x5a810000 0x4000>; interrupts = ; - clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c1_lpcg IMX_LPCG_CLK_0>, + <&i2c1_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_1 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_1>; @@ -133,8 +137,10 @@ i2c1: i2c@5a810000 { i2c2: i2c@5a820000 { reg = <0x5a820000 0x4000>; interrupts = ; - clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c2_lpcg IMX_LPCG_CLK_0>, + <&i2c2_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_2 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_2>; @@ -144,8 +150,10 @@ i2c2: i2c@5a820000 { i2c3: i2c@5a830000 { reg = <0x5a830000 0x4000>; interrupts = ; - clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>; - clock-names = "per"; + interrupt-parent = <&gic>; + clocks = <&i2c3_lpcg IMX_LPCG_CLK_0>, + <&i2c3_lpcg IMX_LPCG_CLK_4>; + clock-names = "per", "ipg"; assigned-clocks = <&clk IMX_SC_R_I2C_3 IMX_SC_PM_CLK_PER>; assigned-clock-rates = <24000000>; power-domains = <&pd IMX_SC_R_I2C_3>; -- 2.25.1