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To:     Rob Herring <robh+dt@kernel.org>,
        Paul Walmsley <paul.walmsley@sifive.com>,
        Palmer Dabbelt <palmer@dabbelt.com>,
        Albert Ou <aou@eecs.berkeley.edu>
Cc:     linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
        devicetree@vger.kernel.org
From:   Heinrich Schuchardt <xypron.glpk@gmx.de>
Subject: [RFC] dt-bindings: riscv: enum for riscv,isa
Message-ID: <5385012d-9f09-d7d9-7b6a-cef7de2d4056@gmx.de>
Date:   Tue, 6 Apr 2021 21:05:34 +0200
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In Documentation/devicetree/bindings/riscv/cpus.yaml I find for riscv,isa:

     enum:
       - rv64imac
       - rv64imafdc

This implies that 'rv64imafc' or 'rv64imafdqc' would be illegal values
while these combinations of extensions would be compliant with "The
RISC-V Instruction Set Manual".

To me it does not make much sense to try to enumerate all permissible
permutations of RISC-V extensions.

Shouldn't this enum be removed and replaced by examples?

Best regards

Heinrich