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Date:   Wed, 7 Apr 2021 07:31:35 +0200
From:   Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>
To:     Clemens Gruber <clemens.gruber@pqgruber.com>
Cc:     linux-pwm@vger.kernel.org,
        Thierry Reding <thierry.reding@gmail.com>,
        Sven Van Asbroeck <TheSven73@gmail.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v7 2/8] pwm: pca9685: Support hardware readout
Message-ID: <20210407053135.tx2q4bzxf2lwtqna@pengutronix.de>
References: <20210406164140.81423-1-clemens.gruber@pqgruber.com>
 <20210406164140.81423-2-clemens.gruber@pqgruber.com>
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On Tue, Apr 06, 2021 at 06:41:34PM +0200, Clemens Gruber wrote:
> Implements .get_state to read-out the current hardware state.
>=20
> The hardware readout may return slightly different values than those
> that were set in apply due to the limited range of possible prescale and
> counter register values.
>=20
> Also note that although the datasheet mentions 200 Hz as default
> frequency when using the internal 25 MHz oscillator, the calculated
> period from the default prescaler register setting of 30 is 5079040ns.
>=20
> Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
> ---
> Changes since v6:
> - Added a comment regarding the division (Suggested by Uwe)
> - Rebased
>=20
>  drivers/pwm/pwm-pca9685.c | 46 +++++++++++++++++++++++++++++++++++++++
>  1 file changed, 46 insertions(+)
>=20
> diff --git a/drivers/pwm/pwm-pca9685.c b/drivers/pwm/pwm-pca9685.c
> index 5a2ce97e71fd..d4474c5ff96f 100644
> --- a/drivers/pwm/pwm-pca9685.c
> +++ b/drivers/pwm/pwm-pca9685.c
> @@ -333,6 +333,51 @@ static int pca9685_pwm_apply(struct pwm_chip *chip, =
struct pwm_device *pwm,
>  	return 0;
>  }
> =20
> +static void pca9685_pwm_get_state(struct pwm_chip *chip, struct pwm_devi=
ce *pwm,
> +				  struct pwm_state *state)
> +{
> +	struct pca9685 *pca =3D to_pca(chip);
> +	unsigned long long duty;
> +	unsigned int val =3D 0;
> +
> +	/* Calculate (chip-wide) period from prescale value */
> +	regmap_read(pca->regmap, PCA9685_PRESCALE, &val);
> +	/*
> +	 * PCA9685_OSC_CLOCK_MHZ is 25, i.e. an integer divider of 1000.
> +	 * The following calculation is therefore only a multiplication
> +	 * and we are not losing precision.
> +	 */
> +	state->period =3D (PCA9685_COUNTER_RANGE * 1000 / PCA9685_OSC_CLOCK_MHZ=
) *
> +			(val + 1);
> +
> +	/* The (per-channel) polarity is fixed */
> +	state->polarity =3D PWM_POLARITY_NORMAL;
> +
> +	if (pwm->hwpwm >=3D PCA9685_MAXCHAN) {
> +		/*
> +		 * The "all LEDs" channel does not support HW readout
> +		 * Return 0 and disabled for backwards compatibility
> +		 */
> +		state->duty_cycle =3D 0;
> +		state->enabled =3D false;
> +		return;
> +	}
> +
> +	duty =3D pca9685_pwm_get_duty(pca, pwm->hwpwm);
> +
> +	state->enabled =3D !!duty;
> +	if (!state->enabled) {
> +		state->duty_cycle =3D 0;
> +		return;
> +	} else if (duty =3D=3D PCA9685_COUNTER_RANGE) {
> +		state->duty_cycle =3D state->period;
> +		return;
> +	}
> +
> +	duty *=3D state->period;
> +	state->duty_cycle =3D duty / PCA9685_COUNTER_RANGE;

Given that with duty =3D 0 the chip is still "on" and changing the duty
will first complete the currently running period, I'd model duty=3D0 as
enabled. This also simplifies the code a bit, to something like:


	state->enabled =3D true;
	duty =3D pca9685_pwm_get_duty(pca, pwm->hwpwm);
	state->duty_cycle =3D div_round_up(duty * state->period, PCA9685_COUNTER_R=
ANGE);

(I'm using round-up here assuming apply uses round-down to get
idempotency. In the current patch set state this is wrong however.)

> +}
> +
>  static int pca9685_pwm_request(struct pwm_chip *chip, struct pwm_device =
*pwm)
>  {
>  	struct pca9685 *pca =3D to_pca(chip);

Best regards
Uwe

--=20
Pengutronix e.K.                           | Uwe Kleine-K=F6nig            |
Industrial Linux Solutions                 | https://www.pengutronix.de/ |

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