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[104.57.184.186]) by smtp.gmail.com with ESMTPSA id c12sm5109319oou.26.2021.04.07.20.37.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 07 Apr 2021 20:37:27 -0700 (PDT) Date: Wed, 7 Apr 2021 22:37:25 -0500 From: Bjorn Andersson To: Guru Das Srinagesh Cc: Linus Walleij , Vinod Koul , Rob Herring , Andy Gross , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Manivannan Sadhasivam Subject: Re: [PATCH 2/2] pinctrl: qcom-pmic-gpio: Add support for pm8008 Message-ID: <20210408033725.GO904837@yoga> References: <1568107824b071265b5fc3a195a1d91089ad617a.1617834404.git.gurus@codeaurora.org> <67ce531c58ba5663ec74021b01617e3d5cd106c7.1617834404.git.gurus@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <67ce531c58ba5663ec74021b01617e3d5cd106c7.1617834404.git.gurus@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed 07 Apr 17:35 CDT 2021, Guru Das Srinagesh wrote: > Add support for the two GPIOs present on PM8008. > > Signed-off-by: Guru Das Srinagesh > --- > drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > index c2b9f2e..76e997a 100644 > --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c > @@ -1137,6 +1137,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { > { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, > /* pmx55 has 11 GPIOs with holes on 3, 7, 10, 11 */ > { .compatible = "qcom,pmx55-gpio", .data = (void *) 11 }, > + { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, As with the binding, please keep these sorted alphabetically. With that: Reviewed-by: Bjorn Andersson Regards, Bjorn > { }, > }; > > -- > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > a Linux Foundation Collaborative Project >