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[91.219.240.2]) by smtp.gmail.com with ESMTPSA id gq9sm14465571ejb.62.2021.04.08.05.05.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 08 Apr 2021 05:05:55 -0700 (PDT) From: Vitaly Kuznetsov To: Siddharth Chandrasekaran Cc: Alexander Graf , Evgeny Iakovlev , linux-hyperv@vger.kernel.org, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, "K. Y. Srinivasan" , Haiyang Zhang , Stephen Hemminger , Wei Liu , Thomas Gleixner , Ingo Molnar , Borislav Petkov , x86@kernel.org, "H. Peter Anvin" , Paolo Bonzini , Sean Christopherson , Wanpeng Li , Jim Mattson , Joerg Roedel Subject: Re: [PATCH 4/4] KVM: hyper-v: Advertise support for fast XMM hypercalls In-Reply-To: <20210407211954.32755-5-sidcha@amazon.de> References: <20210407211954.32755-1-sidcha@amazon.de> <20210407211954.32755-5-sidcha@amazon.de> Date: Thu, 08 Apr 2021 14:05:53 +0200 Message-ID: <87blap7zha.fsf@vitty.brq.redhat.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Siddharth Chandrasekaran writes: > Now that all extant hypercalls that can use XMM registers (based on > spec) for input/outputs are patched to support them, we can start > advertising this feature to guests. > > Cc: Alexander Graf > Cc: Evgeny Iakovlev > Signed-off-by: Siddharth Chandrasekaran > --- > arch/x86/include/asm/hyperv-tlfs.h | 4 ++-- > arch/x86/kvm/hyperv.c | 1 + > 2 files changed, 3 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/hyperv-tlfs.h b/arch/x86/include/asm/hyperv-tlfs.h > index e6cd3fee562b..1f160ef60509 100644 > --- a/arch/x86/include/asm/hyperv-tlfs.h > +++ b/arch/x86/include/asm/hyperv-tlfs.h > @@ -49,10 +49,10 @@ > /* Support for physical CPU dynamic partitioning events is available*/ > #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE BIT(3) > /* > - * Support for passing hypercall input parameter block via XMM > + * Support for passing hypercall input and output parameter block via XMM > * registers is available > */ > -#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) > +#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE BIT(4) | BIT(15) TLFS 6.0b states that there are two distinct bits for input and output: CPUID Leaf 0x40000003.EDX: Bit 4: support for passing hypercall input via XMM registers is available. Bit 15: support for returning hypercall output via XMM registers is available. and HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE is not currently used anywhere, I'd suggest we just rename HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE to HV_X64_HYPERCALL_XMM_INPUT_AVAILABLE and add HV_X64_HYPERCALL_XMM_OUTPUT_AVAILABLE (bit 15). > /* Support for a virtual guest idle state is available */ > #define HV_X64_GUEST_IDLE_STATE_AVAILABLE BIT(5) > /* Frequency MSRs available */ > diff --git a/arch/x86/kvm/hyperv.c b/arch/x86/kvm/hyperv.c > index bf2f86f263f1..dd462c1d641d 100644 > --- a/arch/x86/kvm/hyperv.c > +++ b/arch/x86/kvm/hyperv.c > @@ -2254,6 +2254,7 @@ int kvm_get_hv_cpuid(struct kvm_vcpu *vcpu, struct kvm_cpuid2 *cpuid, > ent->ebx |= HV_POST_MESSAGES; > ent->ebx |= HV_SIGNAL_EVENTS; > > + ent->edx |= HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE; > ent->edx |= HV_FEATURE_FREQUENCY_MSRS_AVAILABLE; > ent->edx |= HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE; -- Vitaly