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Date:   Thu, 8 Apr 2021 23:15:07 +0200 (CEST)
From:   Julia Lawall <julia.lawall@inria.fr>
To:     Mitali Borkar <mitaliborkar810@gmail.com>
cc:     clabbe@baylibre.com, mchehab@kernel.org,
        gregkh@linuxfoundation.org, linux-media@vger.kernel.org,
        linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org,
        outreachy-kernel@googlegroups.com, mitali_s@me.iitr.ac.in
Subject: Re: [Outreachy kernel] [PATCH 2/2] media: zoran: replace bit shifts
 by BIT() macro
In-Reply-To: <ac8ec2b70ac2cc7c541c05a1d9a8db1fe79df793.1617912177.git.mitaliborkar810@gmail.com>
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References: <cover.1617912177.git.mitaliborkar810@gmail.com> <ac8ec2b70ac2cc7c541c05a1d9a8db1fe79df793.1617912177.git.mitaliborkar810@gmail.com>
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On Fri, 9 Apr 2021, Mitali Borkar wrote:

> Added #include <linux/bitops.h> and replaced bit shifts by BIT() macro.
> This BIT() macro from linux/bitops.h is used to define ZR36057_VFESPFR_* bitmasks.
> Use of macro is better and neater. It maintains consistency.
> Reported by checkpatch.
>
> Signed-off-by: Mitali Borkar <mitaliborkar810@gmail.com>
> ---
>  drivers/staging/media/zoran/zr36057.h | 10 ++++++----
>  1 file changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/staging/media/zoran/zr36057.h b/drivers/staging/media/zoran/zr36057.h
> index a2a75fd9f535..93075459f910 100644
> --- a/drivers/staging/media/zoran/zr36057.h
> +++ b/drivers/staging/media/zoran/zr36057.h
> @@ -8,6 +8,8 @@
>  #ifndef _ZR36057_H_
>  #define _ZR36057_H_
>
> +#include <linux/bitops.h>
> +
>  /* Zoran ZR36057 registers */
>
>  #define ZR36057_VFEHCR          0x000	/* Video Front End, Horizontal Configuration Register */
> @@ -31,12 +33,12 @@
>  #define ZR36057_VFESPFR_VER_DCM          8
>  #define ZR36057_VFESPFR_DISP_MODE        6
>  #define ZR36057_VFESPFR_YUV422          (0 << 3)
> -#define ZR36057_VFESPFR_RGB888          (1 << 3)
> +#define ZR36057_VFESPFR_RGB888          BIT(3)

Uniformity is generally considered to be more important than using BIT.
Having only a few constants defined using BIT is a bit strange.

julia

>  #define ZR36057_VFESPFR_RGB565          (2 << 3)
>  #define ZR36057_VFESPFR_RGB555          (3 << 3)
> -#define ZR36057_VFESPFR_ERR_DIF          (1 << 2)
> -#define ZR36057_VFESPFR_PACK24          (1 << 1)
> -#define ZR36057_VFESPFR_LITTLE_ENDIAN    (1 << 0)
> +#define ZR36057_VFESPFR_ERR_DIF          BIT(2)
> +#define ZR36057_VFESPFR_PACK24          BIT(1)
> +#define ZR36057_VFESPFR_LITTLE_ENDIAN    BIT(0)
>
>  #define ZR36057_VDTR            0x00c	/* Video Display "Top" Register */
>
> --
> 2.30.2
>
> --
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