Received: by 2002:a05:6a10:9848:0:0:0:0 with SMTP id x8csp1449664pxf; Fri, 9 Apr 2021 08:41:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxww90yT8jxlEEsfiuf7Z++b4ur4XUG3p4xiSoyh7kljxqCQFRlfsSAMlGQO8gyMoEMr9Ks X-Received: by 2002:a17:907:162b:: with SMTP id hb43mr17022583ejc.41.1617982907820; Fri, 09 Apr 2021 08:41:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1617982907; cv=none; d=google.com; s=arc-20160816; b=UX6bRsjsxh4nlNRwXT9rgKXZmP3divDtDoCzjRvu97Us/uOs6/9fEdLwJLdoJcur7q WgKvedcKfNSy0Tcfn/yFSNR7iu+wkIQXMLyZ55y6r16sLpSqvcpp4ay34RV8OpcGLpFW osn/yHuZMGY2HD5ig9AO9SVZ791l8AD6SuRrBT2Ajw/PBlN+ig5zIS5PSs7CIb2VqgzF HML8f1wAybJGgvl+RnXMGqassGl1Wkkh8CzF7BLY2ZsN6JkTBBWEYnbRWT3IvIhK2F// Rm5H5YyBRGaC7QRzc8MI7INL5i6zIVX+p88e+zwlm128Gl/ngUryKHLeWGZSHtofIGg5 ZIEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date:dkim-signature; bh=wBXCbSaC1Hxateqn/Ch5WAilYWAoC2JMMq7UEAHR1do=; b=tK37ar0Uw6fnQqtBsfOCEf9YomCIHCVlim2sR98Dn9jee2I9i70rbYXam/HiWmFCex 2n3E8csXwLPXYiZMnWMS4VOsJ5oHSc060YFJKZI+tfykor1j+2bHkJ8dyLWtUp0Ws40V 6lNIMjuqa5deMLe0Gen8e/yS++dw/eyw6tNQlup0ordXZ2E152NZT5DvFzPMkfEfKNxG xWm//dmUz98g+rqpoOxp44yHh2kZu/P1xGeYZcoebgiEUoqsP7GK23r1sP5UMjiPwk7J hGJ0vZ99rv2GBezOM+f+E4FX2rldOydrUur/blDzlPyrFjIfRdoS+caY7HcNEdwW6bi4 1fVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="y/XdHrgv"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t14si2125155ejf.752.2021.04.09.08.41.24; Fri, 09 Apr 2021 08:41:47 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="y/XdHrgv"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233784AbhDIPkI (ORCPT + 99 others); Fri, 9 Apr 2021 11:40:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43886 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233409AbhDIPkH (ORCPT ); Fri, 9 Apr 2021 11:40:07 -0400 Received: from mail-ot1-x32a.google.com (mail-ot1-x32a.google.com [IPv6:2607:f8b0:4864:20::32a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D3A4C061761 for ; Fri, 9 Apr 2021 08:39:54 -0700 (PDT) Received: by mail-ot1-x32a.google.com with SMTP id g8-20020a9d6c480000b02901b65ca2432cso6084042otq.3 for ; Fri, 09 Apr 2021 08:39:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=wBXCbSaC1Hxateqn/Ch5WAilYWAoC2JMMq7UEAHR1do=; b=y/XdHrgvkAtzZG4AEcQgWJ2CwiXYpD1fnlwtOQEyXqzYlSYIKrCJIeG80oC52ceTuo GpKSfBehqO9Ca7EDiS0O8CtX8s7xVc8OFZ03vEPINOBcZXGnsMAjuXg5i3EUfpbcHTh8 WjEUBL/LpwQpBEPtUHss4TwrxwLjzYqEUn5MNg4p7+l3zGmSiFLHDHcO99yZofocZy3k 0K1i8EQ29byWJ885cgVddwi5H/epqwQLwISzLoft7HYuMzTVBZSrM+K6UPKnKWgOsi5e 1z4NW9Ly2Lfm9xmlqAEgjtHvhSqTUiUZZM+ndDY1j7/88xQf5FiVBTOi6blV4wDzxLch /nIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=wBXCbSaC1Hxateqn/Ch5WAilYWAoC2JMMq7UEAHR1do=; b=UjhhMzlJNjWAV1y30R7+LPMjQeeaDq/O9btXN9es+yET4G5QpPV/alJc00inE5T3gT UcOlxLAgrwVeYIRaGobStPS2KebNGoJVlG2QC7me//oangOdVOo7NHOiebWXJdsGC6jM YJukp1ym8ByGUfP+UVZxaZz4x4DMNT59F6oDuQutBpBTgX1vRjUpR0D29J6ypuyNJ15y jHj7/a2VM1TR1bQC4LsRVUhvjKn96Fy1/XylI6xSCwki6V8mMV7J5VEBxlwhieGaAJfg 0tKRo/6sSpxdSCjxxkHjbZrUWfLEa4oVfEBaf7xDjVXK1OMoUr8Hf1wKBcgo2A9L79dT V46A== X-Gm-Message-State: AOAM531qCcFuX4aFx6hgIHoyHitaWjdarX06T0/f/so4wfpGGEGqE6+N p1KDEMxtiOGeB0KauSnzA2hhBQ== X-Received: by 2002:a9d:4808:: with SMTP id c8mr12915189otf.181.1617982793540; Fri, 09 Apr 2021 08:39:53 -0700 (PDT) Received: from builder.lan (104-57-184-186.lightspeed.austtx.sbcglobal.net. [104.57.184.186]) by smtp.gmail.com with ESMTPSA id v1sm653560otk.67.2021.04.09.08.39.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Apr 2021 08:39:53 -0700 (PDT) Date: Fri, 9 Apr 2021 10:39:51 -0500 From: Bjorn Andersson To: Serge Semin Cc: Andy Gross , Felipe Balbi , Michael Ellerman , Vladimir Zapolskiy , Alexey Brodkin , Vineet Gupta , Rob Herring , Greg Kroah-Hartman , Krzysztof Kozlowski , linux-usb@vger.kernel.org, Serge Semin , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH RESEND v8 7/7] arm64: dts: qcom: Harmonize DWC USB3 DT nodes name Message-ID: References: <20210409113029.7144-1-Sergey.Semin@baikalelectronics.ru> <20210409113029.7144-8-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210409113029.7144-8-Sergey.Semin@baikalelectronics.ru> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri 09 Apr 06:30 CDT 2021, Serge Semin wrote: > In accordance with the DWC USB3 bindings the corresponding node > name is suppose to comply with the Generic USB HCD DT schema, which > requires the USB nodes to have the name acceptable by the regexp: > "^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly > named. > > Signed-off-by: Serge Semin > Acked-by: Krzysztof Kozlowski > Reviewed-by: Bjorn Andersson As mentioned previously, I would like to merge this through the qcom soc tree to avoid conflicts with other activities, but need the driver code (patch 6) to land first. Regards, Bjorn > --- > arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi | 4 ++-- > arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++-- > arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- > arch/arm64/boot/dts/qcom/msm8998.dtsi | 2 +- > arch/arm64/boot/dts/qcom/qcs404-evb.dtsi | 2 +- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 4 ++-- > arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 4 ++-- > arch/arm64/boot/dts/qcom/sm8150.dtsi | 2 +- > 9 files changed, 14 insertions(+), 14 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi > index defcbd15edf9..34e97da98270 100644 > --- a/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi > +++ b/arch/arm64/boot/dts/qcom/apq8096-db820c.dtsi > @@ -1064,7 +1064,7 @@ &usb2 { > status = "okay"; > extcon = <&usb2_id>; > > - dwc3@7600000 { > + usb@7600000 { > extcon = <&usb2_id>; > dr_mode = "otg"; > maximum-speed = "high-speed"; > @@ -1075,7 +1075,7 @@ &usb3 { > status = "okay"; > extcon = <&usb3_id>; > > - dwc3@6a00000 { > + usb@6a00000 { > extcon = <&usb3_id>; > dr_mode = "otg"; > }; > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > index a32e5e79ab0b..7df4eb710aae 100644 > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi > @@ -427,7 +427,7 @@ usb_0: usb@8af8800 { > resets = <&gcc GCC_USB0_BCR>; > status = "disabled"; > > - dwc_0: dwc3@8a00000 { > + dwc_0: usb@8a00000 { > compatible = "snps,dwc3"; > reg = <0x8a00000 0xcd00>; > interrupts = ; > @@ -468,7 +468,7 @@ usb_1: usb@8cf8800 { > resets = <&gcc GCC_USB1_BCR>; > status = "disabled"; > > - dwc_1: dwc3@8c00000 { > + dwc_1: usb@8c00000 { > compatible = "snps,dwc3"; > reg = <0x8c00000 0xcd00>; > interrupts = ; > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > index ce430ba9c118..9eb31b3e6ee7 100644 > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > @@ -1772,7 +1772,7 @@ usb3: usb@6af8800 { > power-domains = <&gcc USB30_GDSC>; > status = "disabled"; > > - dwc3@6a00000 { > + usb@6a00000 { > compatible = "snps,dwc3"; > reg = <0x06a00000 0xcc00>; > interrupts = <0 131 IRQ_TYPE_LEVEL_HIGH>; > @@ -1983,7 +1983,7 @@ usb2: usb@76f8800 { > power-domains = <&gcc USB30_GDSC>; > status = "disabled"; > > - dwc3@7600000 { > + usb@7600000 { > compatible = "snps,dwc3"; > reg = <0x07600000 0xcc00>; > interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>; > diff --git a/arch/arm64/boot/dts/qcom/msm8998.dtsi b/arch/arm64/boot/dts/qcom/msm8998.dtsi > index 1f2e93aa6553..9141c5d09b59 100644 > --- a/arch/arm64/boot/dts/qcom/msm8998.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8998.dtsi > @@ -1962,7 +1962,7 @@ usb3: usb@a8f8800 { > > resets = <&gcc GCC_USB_30_BCR>; > > - usb3_dwc3: dwc3@a800000 { > + usb3_dwc3: usb@a800000 { > compatible = "snps,dwc3"; > reg = <0x0a800000 0xcd00>; > interrupts = ; > diff --git a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi > index a80c578484ba..f8a55307b855 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404-evb.dtsi > @@ -337,7 +337,7 @@ &usb2_phy_sec { > &usb3 { > status = "okay"; > > - dwc3@7580000 { > + usb@7580000 { > dr_mode = "host"; > }; > }; > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index 339790ba585d..9c4be020d568 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -544,7 +544,7 @@ usb3: usb@7678800 { > assigned-clock-rates = <19200000>, <200000000>; > status = "disabled"; > > - dwc3@7580000 { > + usb@7580000 { > compatible = "snps,dwc3"; > reg = <0x07580000 0xcd00>; > interrupts = ; > @@ -573,7 +573,7 @@ usb2: usb@79b8800 { > assigned-clock-rates = <19200000>, <133333333>; > status = "disabled"; > > - dwc3@78c0000 { > + usb@78c0000 { > compatible = "snps,dwc3"; > reg = <0x078c0000 0xcc00>; > interrupts = ; > diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi > index 1ea3344ab62c..8b83ffbb5b2a 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi > @@ -2869,7 +2869,7 @@ usb_1: usb@a6f8800 { > <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3 0>; > interconnect-names = "usb-ddr", "apps-usb"; > > - usb_1_dwc3: dwc3@a600000 { > + usb_1_dwc3: usb@a600000 { > compatible = "snps,dwc3"; > reg = <0 0x0a600000 0 0xe000>; > interrupts = ; > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index 454f794af547..809be2c67d7a 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -3769,7 +3769,7 @@ usb_1: usb@a6f8800 { > <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_0 0>; > interconnect-names = "usb-ddr", "apps-usb"; > > - usb_1_dwc3: dwc3@a600000 { > + usb_1_dwc3: usb@a600000 { > compatible = "snps,dwc3"; > reg = <0 0x0a600000 0 0xcd00>; > interrupts = ; > @@ -3817,7 +3817,7 @@ usb_2: usb@a8f8800 { > <&gladiator_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_1 0>; > interconnect-names = "usb-ddr", "apps-usb"; > > - usb_2_dwc3: dwc3@a800000 { > + usb_2_dwc3: usb@a800000 { > compatible = "snps,dwc3"; > reg = <0 0x0a800000 0 0xcd00>; > interrupts = ; > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi > index e5bb17bc2f46..e4c3edc13676 100644 > --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi > +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi > @@ -1719,7 +1719,7 @@ usb_1: usb@a6f8800 { > > resets = <&gcc GCC_USB30_PRIM_BCR>; > > - usb_1_dwc3: dwc3@a600000 { > + usb_1_dwc3: usb@a600000 { > compatible = "snps,dwc3"; > reg = <0 0x0a600000 0 0xcd00>; > interrupts = ; > -- > 2.30.1 >