Received: by 2002:a05:6a10:17d3:0:0:0:0 with SMTP id hz19csp602867pxb; Sat, 10 Apr 2021 12:52:12 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwefwT2yYEXrw/UYwAujH0CxWezhAfiZFMbrcfRe/XUFF75KVXI9CpIC1Jlb44NNacCAZgX X-Received: by 2002:a63:4d0:: with SMTP id 199mr19702966pge.304.1618084332182; Sat, 10 Apr 2021 12:52:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618084332; cv=none; d=google.com; s=arc-20160816; b=1F2Xg9itUYGEZ3IeX8/bnQpEbJ/XrEvqUPvKjiq8ZjO0WhFVO/uSaOSt0dJaZHZ4EH SzOH+HgB/eUcKR0wCWCTVnOMPSLJrphbO6n7CdUVDKpZM83pav/YwXrzgvw59wRVzrBk GWRDNPDKx53eUtTCCshMXT7wXczitazWBwD4qezENd6mB5aHTApYP4rZb9k2r/Bw/Aen vcpanFNhgfIYrTcvsd2/ZAeqOp+Mnb+nHlf5RtN/5C7fXwTlmqvdlkHSjdeRk9bJEjK3 7DZgjpHOCccTbFwnYwzaX2Dej1CCdPqRRSroMAtMJJ5pkV7WuEj63BPS6QlDw4NSUqOG u7XQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:to:content-transfer-encoding:content-disposition :mime-version:message-id:subject:cc:from:date; bh=laZpP7AaCU97v12Iz1uH9y0YVQp+xQrj9TIOgkbsjLE=; b=zkN7s6jVSo8FE/w0oq4XcuHLSTFY1GUKYSxQZeNZ41AXuaUh0FjUWWmirdT6uJsIOU lJmvEm46oZENUomT1bGDk20Avzj0AKMOOnkuHqo46Hwep/GRHX5MxxcKi92lqGxrSvzD YS0+ZWmXg34Zn11joy2vM+DiP1yjREOgVApjF2R1t3a+snmxWVTI3+dmtm69FjxCVUIG sN6Dh7kdsYXPjHKQVR6dA0G1BGH+mMuXreIHNoNpqP8/WDbp3sRW2mO061jSpd2FQ0qo pVgbicYWwbpkV+wvAIuMk4B7mlq7FfOt3nSqvxx0Ikz77ranI91vYJ6KQ13jsSC+vZUK 475w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j64si8010825pfb.142.2021.04.10.12.51.59; Sat, 10 Apr 2021 12:52:12 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234948AbhDJTvq (ORCPT + 99 others); Sat, 10 Apr 2021 15:51:46 -0400 Received: from mx01.ayax.eu ([188.137.98.110]:51622 "EHLO mx01.ayax.eu" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234439AbhDJTvp (ORCPT ); Sat, 10 Apr 2021 15:51:45 -0400 X-Greylist: delayed 956 seconds by postgrey-1.27 at vger.kernel.org; Sat, 10 Apr 2021 15:51:45 EDT Received: from [192.168.192.146] (port=42076 helo=nx64de-df6d00) by mx01.ayax.eu with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1lVJO6-0006x5-S6; Sat, 10 Apr 2021 21:35:23 +0200 Date: Sat, 10 Apr 2021 21:35:21 +0200 From: Grzegorz Szymaszek Cc: Grzegorz Szymaszek , Ahmad Fatoum , Alexandre Torgue , Marcin =?utf-8?Q?S=C5=82oniewski?= , Maxime Coquelin , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH] ARM: dts: stm32: fix stm32mp157c-odyssey card detect pin Message-ID: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The microSD card detect pin is physically connected to the MPU pin PI3. The Device Tree configuration of the card detect pin was wrong—it was set to pin PB7 instead. If such configuration was used, the kernel would hang on “Waiting for root device” when booting from a microSD card. Signed-off-by: Grzegorz Szymaszek --- arch/arm/boot/dts/stm32mp157c-odyssey.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/stm32mp157c-odyssey.dts b/arch/arm/boot/dts/stm32mp157c-odyssey.dts index a7ffec8f1516..be1dd5e9e744 100644 --- a/arch/arm/boot/dts/stm32mp157c-odyssey.dts +++ b/arch/arm/boot/dts/stm32mp157c-odyssey.dts @@ -64,7 +64,7 @@ &sdmmc1 { pinctrl-0 = <&sdmmc1_b4_pins_a>; pinctrl-1 = <&sdmmc1_b4_od_pins_a>; pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; - cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; + cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; disable-wp; st,neg-edge; bus-width = <4>; -- 2.30.2