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[23.128.96.18]) by mx.google.com with ESMTP id m4si12334061plt.179.2021.04.11.22.13.57; Sun, 11 Apr 2021 22:14:09 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230034AbhDLFMq (ORCPT + 99 others); Mon, 12 Apr 2021 01:12:46 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:41753 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229493AbhDLFMp (ORCPT ); Mon, 12 Apr 2021 01:12:45 -0400 X-Originating-IP: 2.7.49.219 Received: from [192.168.1.100] (lfbn-lyo-1-457-219.w2-7.abo.wanadoo.fr [2.7.49.219]) (Authenticated sender: alex@ghiti.fr) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id B2748E0007; Mon, 12 Apr 2021 05:12:23 +0000 (UTC) From: Alex Ghiti Subject: Re: [PATCH v7] RISC-V: enable XIP To: Vitaly Wool , Mike Rapoport Cc: David Hildenbrand , Paul Walmsley , Palmer Dabbelt , Albert Ou , linux-riscv , LKML , linux-arch@vger.kernel.org, Linux-MM References: <20210409065115.11054-1-alex@ghiti.fr> <3500f3cb-b660-5bbc-ae8d-0c9770e4a573@ghiti.fr> Message-ID: Date: Mon, 12 Apr 2021 01:12:23 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.9.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=windows-1252; format=flowed Content-Language: fr Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le 4/9/21 ? 10:42 AM, Vitaly Wool a ?crit?: > On Fri, Apr 9, 2021 at 3:59 PM Mike Rapoport wrote: >> >> On Fri, Apr 09, 2021 at 02:46:17PM +0200, David Hildenbrand wrote: >>>>>> Also, will that memory properly be exposed in the resource tree as >>>>>> System RAM (e.g., /proc/iomem) ? Otherwise some things (/proc/kcore) >>>>>> won't work as expected - the kernel won't be included in a dump. >>>> Do we really need a XIP kernel to included in kdump? >>>> And does not it sound weird to expose flash as System RAM in /proc/iomem? ;-) >>> >>> See my other mail, maybe we actually want something different. >>> >>>> >>>>> I have just checked and it does not appear in /proc/iomem. >>>>> >>>>> Ok your conclusion would be to have struct page, I'm going to implement this >>>>> version then using memblock as you described. >>>> >>>> I'm not sure this is required. With XIP kernel text never gets into RAM, so >>>> it does not seem to require struct page. >>>> >>>> XIP by definition has some limitations relatively to "normal" operation, >>>> so lack of kdump could be one of them. >>> >>> I agree. >>> >>>> >>>> I might be wrong, but IMHO, artificially creating a memory map for part of >>>> flash would cause more problems in the long run. >>> >>> Can you elaborate? >> >> Nothing particular, just a gut feeling. Usually, when you force something >> it comes out the wrong way later. > > It's possible still that MTD_XIP is implemented allowing to write to > the flash used for XIP. While flash is being written, memory map > doesn't make sense at all. I can't come up with a real life example > when it can actually lead to problems but it is indeed weird when > System RAM suddenly becomes unreadable. I really don't think exposing > it in /proc/iomem is a good idea. > >>>> BTW, how does XIP account the kernel text on other architectures that >>>> implement it? >>> >>> Interesting point, I thought XIP would be something new on RISC-V (well, at >>> least to me :) ). If that concept exists already, we better mimic what >>> existing implementations do. >> >> I had quick glance at ARM, it seems that kernel text does not have memory >> map and does not show up in System RAM. > > Exactly, and I believe ARM64 won't do that too when it gets its own > XIP support (which is underway). > memmap does not seem necessary and ARM/ARM64 do not use it. But if someone tries to get a struct page from a physical address that lies in flash, as mentioned by David, that could lead to silent corruptions if something exists at the address where the struct page should be. And it is hard to know which features in the kernel depends on that. Regarding SPARSEMEM, the vmemmap lies in its own region so that's unlikely to happen, so we will catch those invalid accesses (and that's what I observed on riscv). But for FLATMEM, memmap is in the linear mapping, then that could very likely happen silently. Could a simple solution be to force SPARSEMEM for those XIP kernels ? Then wrong things could happen, but we would see those and avoid spending hours to debug :) I will at least send a v8 to remove the pfn_valid modifications for FLATMEM that now returns true to pfn in flash. Thanks, > Best regards, > Vitaly > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv >