Received: by 2002:a05:6a10:17d3:0:0:0:0 with SMTP id hz19csp1567741pxb; Mon, 12 Apr 2021 00:53:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzFLPsUz84itSQxu7JoYGy1CVi30Y/0arWWJpUpr3l5qtHAlslpbrSe9UBTQXK5wzPcHh7w X-Received: by 2002:a17:90a:6f45:: with SMTP id d63mr21785823pjk.39.1618214022647; Mon, 12 Apr 2021 00:53:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618214022; cv=none; d=google.com; s=arc-20160816; b=R6wdDsYP/KSWNrBueb0R6T47R6ee1uKjbqD6mNUOrYbYIBiM4ffFxnIX8Pz9Vo1+UJ BRCqpYujJ76ZaMDlnodxTeR9aRRQrxGd9hIS9w1H3ps080MaqRep7TGumyj1byR7iQ50 Gk+HC4YF6bVT5qMd+15zT7yPExT2iVUIJQWVCiYD75iSrvdTpPgoIWkW18J079kebD22 JaNUT04QYny2iuHGt+xnay+i2RKtNikVY4DCx4J0iWYJZZxcQb+4u46ZbxP1G+igSPtb pAQLmw2/sMzO/Pbjp+LaX4202rsvL38BxAfMHHqLlSt5DqupSrg8t3rfTyX9GbayLHor pa+A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:subject:message-id:date:from:in-reply-to :references:mime-version:dkim-signature; bh=BvYyxcmuuy8Mf4iqwtPOnrJd7sqJQhBveqGwzWHM2us=; b=yBfqus411uxB5RSTfVmoVHwqLN5WsuxxuPUNpNheT3uLz0B2apoZ9NP45heWLMU1s4 3CSaQn8Bq8dZ2TO/GZGT0lYcL2OM7DtKJJy8RIgoImMyXyNx8rlIIZQWLYTfhAz5N/pG DRo/tcfBhq0VRjgfOEXpPeVkOB6rZ7mK4tID7V74cXkWCJmt+4aXoniY/YJA3i1Hb+An wf3x6/stgL/iVrNfWUywfQDI19vZu7jpB4W7ullVV4ylZIt4gWmiLA0tqN5VmBDx0PSF i5tSRwotuxNjKsI3xP4H49kyd7s0v8JjHO9TWnVazYz7Iqx9t9WhWhPAKr1gzQwITVFa PEZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FskClHSp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t12si12488952pgh.581.2021.04.12.00.53.30; Mon, 12 Apr 2021 00:53:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FskClHSp; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237169AbhDLHxF (ORCPT + 99 others); Mon, 12 Apr 2021 03:53:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237159AbhDLHxD (ORCPT ); Mon, 12 Apr 2021 03:53:03 -0400 Received: from mail-ua1-x929.google.com (mail-ua1-x929.google.com [IPv6:2607:f8b0:4864:20::929]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F636C06138C for ; Mon, 12 Apr 2021 00:52:46 -0700 (PDT) Received: by mail-ua1-x929.google.com with SMTP id v23so3930999uaq.13 for ; Mon, 12 Apr 2021 00:52:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=BvYyxcmuuy8Mf4iqwtPOnrJd7sqJQhBveqGwzWHM2us=; b=FskClHSpA1eGLUsuHiI6LnX7OEUf5wbqlhBkpSTyjUtn2HF2pPy0ceC0FUErKI/+RV HINipnQVhtE+TQ6Na2NrF0f/E0lzROKZbnfbtd91ADo+Li02q983L7r3yg4zEmm88bpU 4yMpVKJgyMTxilsbcuWmJ5C4Sv4jPcjeSt+aURZ0QjhlpNbPeAcSSPj4YbQgH/iEQHYX 4h0ORwLA/i+D5pGuVONA+TBrQN/PENvN4Jymw2QbjrO5ICWPN3Vanpkhu0Ejs96T9JeH thCDj6mDZQNq1Je01noeFz0/3Hb5VU7zB1rdZCfV7Bhy+B17GSlAL+Sn/3qMytAhbvmT Jcxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=BvYyxcmuuy8Mf4iqwtPOnrJd7sqJQhBveqGwzWHM2us=; b=HcvPkDg7P9o3AJlml++V+5hwLzbtq33/qj7FR6nDVjI+2/oKRwRjnSgtyOUh89wuyT PQYFPm131maetQ6rFx9H0s1aaazzBQz4VxCOjxj1J0ZXVDLOQLyZdPgvYTyvfYKwUSiN BwcbegQ6MfLe01yN6Rie+MHi7raufLfShETQ+8wysMHC/9Ns82JgR45yCCEqRyj5wkoB 6/0pxY5TQeOybpQKbJGJKb9hhjhX5tafWPQYx7p7l/73+eYvtaRLtRY/LiQraOzT/NfE qQObjKZD8ybSFuK7/wWddotw59gg7N0JazD1TyamJ491x4kMZl7kxkob+gXxCa6Zs0y1 4kQg== X-Gm-Message-State: AOAM5322zqs28yYszv1pczk3oLOtBJjhJS+9jLzbTsb7APG2djhpnyAU K7VKrwrXW2zxBY4X0GqdIfRgr1PQQTBnUzsSF9OGwg== X-Received: by 2002:ab0:6f0e:: with SMTP id r14mr18905449uah.15.1618213965308; Mon, 12 Apr 2021 00:52:45 -0700 (PDT) MIME-Version: 1.0 References: <20210407093816.8863-1-benchuanggli@gmail.com> In-Reply-To: <20210407093816.8863-1-benchuanggli@gmail.com> From: Ulf Hansson Date: Mon, 12 Apr 2021 09:52:08 +0200 Message-ID: Subject: Re: [RESEND, PATCH] mmc: sdhci-pci-gli: Improve GL9763E L1 entry delay to increase battery life To: Ben Chuang Cc: Adrian Hunter , linux-mmc , Linux Kernel Mailing List , =?UTF-8?B?UmVuaXVzQ2hlblvpmbPlu7rlro9d?= , SeanHY.Chen@genesyslogic.com.tw, =?UTF-8?B?R3JlZ1R1W+adnOWVn+i7kl0=?= , Ben Chuang Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 7 Apr 2021 at 11:35, Ben Chuang wrote: > > From: Ben Chuang > > For GL9763E, although there is the best performance at the maximum delay. > Change the value to 20us in order to have better power consumption. > This change may reduce the maximum performance by 10%. > > Signed-off-by: Ben Chuang Applied for next, thanks! Kind regards Uffe > --- > drivers/mmc/host/sdhci-pci-gli.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/mmc/host/sdhci-pci-gli.c b/drivers/mmc/host/sdhci-pci-gli.c > index 4a0f69b97a78..3b0a049d4124 100644 > --- a/drivers/mmc/host/sdhci-pci-gli.c > +++ b/drivers/mmc/host/sdhci-pci-gli.c > @@ -90,7 +90,7 @@ > > #define PCIE_GLI_9763E_CFG2 0x8A4 > #define GLI_9763E_CFG2_L1DLY GENMASK(28, 19) > -#define GLI_9763E_CFG2_L1DLY_MAX 0x3FF > +#define GLI_9763E_CFG2_L1DLY_MID 0x50 > > #define PCIE_GLI_9763E_MMC_CTRL 0x960 > #define GLI_9763E_HS400_SLOW BIT(3) > @@ -802,8 +802,8 @@ static void gli_set_gl9763e(struct sdhci_pci_slot *slot) > > pci_read_config_dword(pdev, PCIE_GLI_9763E_CFG2, &value); > value &= ~GLI_9763E_CFG2_L1DLY; > - /* set ASPM L1 entry delay to 260us */ > - value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MAX); > + /* set ASPM L1 entry delay to 20us */ > + value |= FIELD_PREP(GLI_9763E_CFG2_L1DLY, GLI_9763E_CFG2_L1DLY_MID); > pci_write_config_dword(pdev, PCIE_GLI_9763E_CFG2, value); > > pci_read_config_dword(pdev, PCIE_GLI_9763E_CLKRXDLY, &value); > -- > 2.30.0 >