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[23.128.96.18]) by mx.google.com with ESMTP id w11si3168659pfn.135.2021.04.12.17.05.52; Mon, 12 Apr 2021 17:06:31 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=pFgLmUSH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238966AbhDLKyZ (ORCPT + 99 others); Mon, 12 Apr 2021 06:54:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35500 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238173AbhDLKyY (ORCPT ); Mon, 12 Apr 2021 06:54:24 -0400 Received: from mail-lf1-x12f.google.com (mail-lf1-x12f.google.com [IPv6:2a00:1450:4864:20::12f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 18D00C061574 for ; Mon, 12 Apr 2021 03:54:06 -0700 (PDT) Received: by mail-lf1-x12f.google.com with SMTP id g8so20616546lfv.12 for ; Mon, 12 Apr 2021 03:54:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=XRo5bssRo3/XOxD6r9RHZSv39kKk8qwong4dLDxEyOs=; b=pFgLmUSH1fcBkkYI6Fr0B2MWG/Y+A2QqG3L3jgwYzCEQg7i8MKlmktaoafe6ux5F/i rN/7bovLjqeWJ4kGdWKmxEDfkyWQnLj573ApF6QqfFNk7VtoL9nAmehfHb5t8SW44Dur yggYrfCio56lRiTp/cWWwor+7vA4Ph+SQbX1BnwaGjcNG8xzVDvUDe5ChjEEeOTvkHSz tSR/GilZhLeuDNA0nnuqnpQOUxcoF/och/SEq98SHCAH0LX0qg6wihw5O4yYbIcwVsjP gIcxuhIEXHCGQGrAIKuwRWRSP9naaQTnqRuE+9ft0GAm1Ni9YDy8qNG3a5UF6Cu7mQu8 0zKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=XRo5bssRo3/XOxD6r9RHZSv39kKk8qwong4dLDxEyOs=; b=Pn6lFHmJCkgaL8fX3CugiAm1GJIiLyXp41w9Yt2OeTA10cnWW9HVeI63wcoNURSZ1Z GanYtubdPEPNMuaWLO6VMcs/9iGDQ+36FHQqq/RC3okpRwyEjTEQsQj74s90+ctolm/R UIekmmPwp6w2x0tcMI1ZvkqKRbHOBYUdUQJjKE89gyW1HKmGOIwmrO/S9SuEod28c/+n vh9hoLTZedjzx+rBgDe556aYMpzsURSjY/+POF80Sc/Ck0bCecEc8adtkfU0d56W9yrF mRNUs3utxBCQALbBFrsITlOGWny8KOiAjw5bLtwG+ECYxkzQ42tExvt5cpQJDYOvGEiC 61rQ== X-Gm-Message-State: AOAM530S3VCsafNAzvO75vnxMGPMbjVPjdRZMUlNQcQFfeohpOM2766G VpuItH3q6KUiS6hnP86+ZPkNwQbQWnW2KyidG+0= X-Received: by 2002:a05:6512:3a83:: with SMTP id q3mr19052874lfu.460.1618224844513; Mon, 12 Apr 2021 03:54:04 -0700 (PDT) MIME-Version: 1.0 References: <20210330052154.26861-1-xuewen.yan94@gmail.com> <34ce11ad-9c20-7ba7-90d8-4830725bf38a@arm.com> <1ebddd33-4666-1e6e-7788-a3fe28c9e99c@arm.com> In-Reply-To: From: Xuewen Yan Date: Mon, 12 Apr 2021 18:52:52 +0800 Message-ID: Subject: Re: [PATCH] sched/fair: use signed long when compute energy delta in eas To: Pierre Gondois Cc: Dietmar Eggemann , Quentin Perret , Ingo Molnar , Peter Zijlstra , Juri Lelli , Vincent Guittot , Steven Rostedt , Benjamin Segall , Mel Gorman , Daniel Bristot de Oliveira , linux-kernel , Chunyan Zhang , Ryan Y Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi > > Hi, > > > > > > This patch-set is not significantly improving the execution time of > > > feec(). The results we have so far are an improvement of 5-10% in > > > execution time, with feec() being executed in < 10us. So the gain is = not > > > spectacular. > > > > well=EF=BC=8C I meaned to cache all util value and compute energy with = caches, > > when > > (cpu=3D=3Ddst_cpu), use caches instead of updating util, and do not get > > util with function: > > "effective_cpu_util()", to compute util with cache. > > I add more parameters into pd_cache: > > struct pd_cache { > > unsigned long util; > > unsigned long util_est; > > unsigned long util_cfs; > > unsigned long util_irq; > > unsigned long util_rt; > > unsigned long util_dl; > > unsigned long bw_dl; > > unsigned long freq_util; > > unsigned long nrg_util; > > }; > > In this way, it can avoid util update while feec. I tested with it, > > and the negative delta disappeared. > > Maybe this is not a good method, but it does work. > If I understand correctly, you put all the fields used by > core.c:effective_cpu_util() in the caches, allowing to have values not > subject to updates. Yes. > core.c:effective_cpu_util() isn't only called from > fair.c:compute_energy(). It is used in the cpufreq_schedutil.c and > cpufreq_cooling.c (through core.c:sched_cpu_util()). > Did you have to duplicate core.c:effective_cpu_util() to have a second > version using the caches ? If yes, I think the function was meant to be > unique so that all the utilization estimations go through the same path. > I defined a new function to distinguish it from the effective_cpu_util. > If your concern is to avoid negative delta, I think just bailing out > when this happens should be sufficient. As shown in the last message, > having a wrong placement should not happen that often, plus the prev_cpu > should be used which should be ok. In your patch, you didn't actually choose the prev_cpu. you return (-1); > If you want to cache the values, I think a stronger justification will > be asked: this seems to be a big modification compared to the initial > issue, knowing that another simpler solution is available (i.e. bailing > out). I was not able to prove there was a significant gain in the > find_energy_efficient_cpu() execution time, but I would be happy if you > can, or if you find other arguments. Yes, you are right, perhaps there is indeed no need for such a big modifica= tion. Regards