Received: by 2002:a05:6a10:17d3:0:0:0:0 with SMTP id hz19csp2393419pxb; Tue, 13 Apr 2021 00:19:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxYRKgQIOEZef6Ol7w6D7rIxSe6rBE5zB/djMAgzEzG7PkImebLQuuMLwC+lOur4+JWrOop X-Received: by 2002:a17:906:1a09:: with SMTP id i9mr16177487ejf.213.1618298394640; Tue, 13 Apr 2021 00:19:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618298394; cv=none; d=google.com; s=arc-20160816; b=GFmMdcj9hlpdmwF9govDIQpREdwjAWcYtH55lORfq1PPlIVj8nMzl7dPMgH5+WJ+tS tUnxXcdBTW2OpIH2BSx1Bv0DeLTiSwMbGzS5J8OHaVl322eN6QORdP5pO6xMaTD6r+kG PYMlA6C2gmEU7jKFMpKYka4PhdZ0Bz9TXwdZg5mph/mNe0T58HYuSm+fJeS8D3BTg6I3 WdFo1iNcFr7v9krkqrNG8i56Ye/RKb9kQztTs4bHM9aWnnIDMr6NWh8qqOM7QzsTN6H+ qsgMsKMSwQgwyAZuqFyLBJ/G9E9vuwRfO62SJr2GQcwHKL++Kp7VL4RsWKxXL4ksk2in xpEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=9ZnLTT9I9QS45XP0gU378ArPJQXxLkRP6ukiG6bO5Co=; b=YnWQxv5FDudQ9cWX0Aad3aDpRWWZRJQdcRp8M8eCakW154GVhaQ7Yn93gaXUTDHFG0 NX8bQrRbb1hyqZLPy/PNMXrK095WsvLjyX0oJUKtZNALQBEiHmWf3UzUFUO10JF0Jr7m U63sPUYbrFFJWT8fotUrmlr5Ca/xRAzq8fWRP2tpof9nAPsX7/qYNxXQp+v9bBDACFFl MSQbSfAMw3s+ltGAlAgFSNaktXpfWvtvSUPc4ki6Rvxt4QCZDGkbol1o5o4JnMiiwRvg /TmyCoZsolbdBb/NzooHfckNOmeAoeeJHWOcaB0KKjemiTG+hp1tohDE8hOuwOPbwBvP rpbQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a20si9598654ejg.702.2021.04.13.00.19.29; Tue, 13 Apr 2021 00:19:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343638AbhDLWOT (ORCPT + 99 others); Mon, 12 Apr 2021 18:14:19 -0400 Received: from gate.crashing.org ([63.228.1.57]:60708 "EHLO gate.crashing.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S243890AbhDLWOG (ORCPT ); Mon, 12 Apr 2021 18:14:06 -0400 Received: from gate.crashing.org (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id 13CM8MKP012708; Mon, 12 Apr 2021 17:08:22 -0500 Received: (from segher@localhost) by gate.crashing.org (8.14.1/8.14.1/Submit) id 13CM8MWJ012707; Mon, 12 Apr 2021 17:08:22 -0500 X-Authentication-Warning: gate.crashing.org: segher set sender to segher@kernel.crashing.org using -f Date: Mon, 12 Apr 2021 17:08:22 -0500 From: Segher Boessenkool To: Christophe Leroy Cc: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 2/2] powerpc/atomics: Use immediate operand when possible Message-ID: <20210412220821.GN26583@gate.crashing.org> References: <09da6fec57792d6559d1ea64e00be9870b02dab4.1617896018.git.christophe.leroy@csgroup.eu> <9f50b5fadeb090553e5c2fae025052d04d52f3c7.1617896018.git.christophe.leroy@csgroup.eu> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9f50b5fadeb090553e5c2fae025052d04d52f3c7.1617896018.git.christophe.leroy@csgroup.eu> User-Agent: Mutt/1.4.2.3i Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi! On Thu, Apr 08, 2021 at 03:33:45PM +0000, Christophe Leroy wrote: > +#define ATOMIC_OP(op, asm_op, dot, sign) \ > static __inline__ void atomic_##op(int a, atomic_t *v) \ > { \ > int t; \ > \ > __asm__ __volatile__( \ > "1: lwarx %0,0,%3 # atomic_" #op "\n" \ > - #asm_op " %0,%2,%0\n" \ > + #asm_op "%I2" dot " %0,%0,%2\n" \ > " stwcx. %0,0,%3 \n" \ > " bne- 1b\n" \ > - : "=&r" (t), "+m" (v->counter) \ > - : "r" (a), "r" (&v->counter) \ > + : "=&b" (t), "+m" (v->counter) \ > + : "r"#sign (a), "r" (&v->counter) \ > : "cc"); \ > } \ You need "b" (instead of "r") only for "addi". You can use "addic" instead, which clobbers XER[CA], but *all* inline asm does, so that is not a downside here (it is also not slower on any CPU that matters). > @@ -238,14 +238,14 @@ static __inline__ int atomic_fetch_add_unless(atomic_t *v, int a, int u) > "1: lwarx %0,0,%1 # atomic_fetch_add_unless\n\ > cmpw 0,%0,%3 \n\ > beq 2f \n\ > - add %0,%2,%0 \n" > + add%I2 %0,%0,%2 \n" > " stwcx. %0,0,%1 \n\ > bne- 1b \n" > PPC_ATOMIC_EXIT_BARRIER > -" subf %0,%2,%0 \n\ > +" sub%I2 %0,%0,%2 \n\ > 2:" > - : "=&r" (t) > - : "r" (&v->counter), "r" (a), "r" (u) > + : "=&b" (t) > + : "r" (&v->counter), "rI" (a), "r" (u) > : "cc", "memory"); Same here. Nice patches! Acked-by: Segher Boessenkool Segher