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References: <20210413062146.389690-1-ilya.lipnitskiy@gmail.com> <20210413062146.389690-3-ilya.lipnitskiy@gmail.com>
In-Reply-To: <20210413062146.389690-3-ilya.lipnitskiy@gmail.com>
From:   Sergey Ryazanov <ryazanov.s.a@gmail.com>
Date:   Tue, 13 Apr 2021 16:28:06 +0300
Message-ID: <CAHNKnsS5Kn86g2QkFJ0qYsGPf9htmF=n-imVQBWDKYn0C+qOSA@mail.gmail.com>
Subject: Re: [PATCH 2/8] MIPS: pci-rt2880: remove unneeded locks
To:     Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Cc:     Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
        linux-mips@vger.kernel.org,
        open list <linux-kernel@vger.kernel.org>
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Hello Ilya,

On Tue, Apr 13, 2021 at 9:22 AM Ilya Lipnitskiy
<ilya.lipnitskiy@gmail.com> wrote:
> Mirror pci-rt3883 fix from commit e5067c718b3a ("MIPS: pci-rt3883:
> Remove odd locking in PCI config space access code"). pci-rt2880 shares
> the driver layout with pci-rt3883 and the same reasons apply.
>
> Caller (generic PCI code) already does proper locking, so no need to add
> another one here. Local PCI read/write functions are never called
> simultaneously, also they do not require synchronization with the PCI
> controller ops, since they are used before the controller registration.
>
> Suggested-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
> Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
> ---
>  arch/mips/pci/pci-rt2880.c | 13 -------------
>  1 file changed, 13 deletions(-)
>
> diff --git a/arch/mips/pci/pci-rt2880.c b/arch/mips/pci/pci-rt2880.c
> index 19f7860fb28b..b4ee07cbcf2a 100644
> --- a/arch/mips/pci/pci-rt2880.c
> +++ b/arch/mips/pci/pci-rt2880.c
> @@ -41,7 +41,6 @@
>  #define RT2880_PCI_REG_ARBCTL          0x80
>
>  static void __iomem *rt2880_pci_base;
> -static DEFINE_SPINLOCK(rt2880_pci_lock);
>
>  static u32 rt2880_pci_reg_read(u32 reg)
>  {
> @@ -63,7 +62,6 @@ static inline u32 rt2880_pci_get_cfgaddr(unsigned int bus, unsigned int slot,
>  static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
>                                   int where, int size, u32 *val)
>  {
> -       unsigned long flags;
>         u32 address;
>         u32 data;
>         int busn = 0;
> @@ -74,10 +72,8 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
>         address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
>                                          where);
>
> -       spin_lock_irqsave(&rt2880_pci_lock, flags);
>         rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
>         data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> -       spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
>         switch (size) {
>         case 1:
> @@ -97,7 +93,6 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
>  static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
>                                    int where, int size, u32 val)
>  {
> -       unsigned long flags;
>         u32 address;
>         u32 data;
>         int busn = 0;
> @@ -108,7 +103,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
>         address = rt2880_pci_get_cfgaddr(busn, PCI_SLOT(devfn), PCI_FUNC(devfn),
>                                          where);
>
> -       spin_lock_irqsave(&rt2880_pci_lock, flags);
>         rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
>         data = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
>
> @@ -127,7 +121,6 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
>         }
>
>         rt2880_pci_reg_write(data, RT2880_PCI_REG_CONFIG_DATA);
> -       spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
>         return PCIBIOS_SUCCESSFUL;
>  }
> @@ -159,31 +152,25 @@ static struct pci_controller rt2880_pci_controller = {
>
>  static inline u32 rt2880_pci_read_u32(unsigned long reg)
>  {
> -       unsigned long flags;
>         u32 address;
>         u32 ret;
>
>         address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
>
> -       spin_lock_irqsave(&rt2880_pci_lock, flags);
>         rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
>         ret = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
> -       spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>
>         return ret;
>  }
>
>  static inline void rt2880_pci_write_u32(unsigned long reg, u32 val)
>  {
> -       unsigned long flags;
>         u32 address;
>
>         address = rt2880_pci_get_cfgaddr(0, 0, 0, reg);
>
> -       spin_lock_irqsave(&rt2880_pci_lock, flags);
>         rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
>         rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
> -       spin_unlock_irqrestore(&rt2880_pci_lock, flags);
>  }
>
>  int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)

RT2880 PCI driver calls rt2880_pci_write_u32()/rt2880_pci_read_u32()
from pcibios_map_irq(), which is called outside the scope of the
pci_lock spinlock that is defined in /drivers/pci/access.c. So it
looks like this could lead to a race between
rt2880_pci_write_u32()/rt2880_pci_read_u32() and
rt2880_pci_config_read()/rt2880_pci_config_write() functions.

The code that uses rt2880_pci_write_u32()/rt2880_pci_read_u32() in the
pcibios_map_irq() duplicates a BAR initialization procedure, which is
already performed by the rt288x_pci_probe().

Maybe we should remove duplicated code in the pcibios_map_irq() to
reduce duplication and to avoid possible race in configuration space
access?

If you fix this possible race, feel free to add in the next patch version my
Reviewed-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>

-- 
Sergey