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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id u7sm2785326pjx.8.2021.04.13.10.49.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Apr 2021 10:49:34 -0700 (PDT) Date: Tue, 13 Apr 2021 11:49:32 -0600 From: Mathieu Poirier To: peng.fan@oss.nxp.com Cc: ohad@wizery.com, bjorn.andersson@linaro.org, o.rempel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-remoteproc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Peng Fan Subject: Re: [PATCH V3 7/8] remoteproc: imx_rproc: support i.MX7ULP Message-ID: <20210413174932.GE750651@xps15> References: <1617846898-13662-1-git-send-email-peng.fan@oss.nxp.com> <1617846898-13662-8-git-send-email-peng.fan@oss.nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1617846898-13662-8-git-send-email-peng.fan@oss.nxp.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Apr 08, 2021 at 09:54:57AM +0800, peng.fan@oss.nxp.com wrote: > From: Peng Fan > > i.MX7ULP A7 core runs under control of M4 core, M4 core starts by ROM > and powers most serivces used by A7 core, so A7 core has no power to > start and stop M4 core. > > Signed-off-by: Peng Fan > --- > drivers/remoteproc/imx_rproc.c | 25 ++++++++++++++++++++++--- > 1 file changed, 22 insertions(+), 3 deletions(-) > > diff --git a/drivers/remoteproc/imx_rproc.c b/drivers/remoteproc/imx_rproc.c > index a7fa9d7fc2d1..b911a7539897 100644 > --- a/drivers/remoteproc/imx_rproc.c > +++ b/drivers/remoteproc/imx_rproc.c > @@ -147,6 +147,14 @@ static const struct imx_rproc_att imx_rproc_att_imx8mq[] = { > { 0x40000000, 0x40000000, 0x80000000, 0 }, > }; > > +static const struct imx_rproc_att imx_rproc_att_imx7ulp[] = { > + {0x1FFD0000, 0x1FFD0000, 0x30000, ATT_OWN}, > + {0x20000000, 0x20000000, 0x10000, ATT_OWN}, > + {0x2F000000, 0x2F000000, 0x20000, ATT_OWN}, > + {0x2F020000, 0x2F020000, 0x20000, ATT_OWN}, > + {0x60000000, 0x60000000, 0x40000000, 0} > +}; > + > static const struct imx_rproc_att imx_rproc_att_imx7d[] = { > /* dev addr , sys addr , size , flags */ > /* OCRAM_S (M4 Boot code) - alias */ > @@ -207,6 +215,12 @@ static const struct imx_rproc_dcfg imx_rproc_cfg_imx8mq = { > .method = IMX_RPROC_MMIO, > }; > > +static const struct imx_rproc_dcfg imx_rproc_cfg_imx7ulp = { > + .att = imx_rproc_att_imx7ulp, > + .att_size = ARRAY_SIZE(imx_rproc_att_imx7ulp), > + .method = IMX_RPROC_NONE, > +}; > + > static const struct imx_rproc_dcfg imx_rproc_cfg_imx7d = { > .src_reg = IMX7D_SRC_SCR, > .src_mask = IMX7D_M4_RST_MASK, > @@ -598,12 +612,16 @@ static int imx_rproc_detect_mode(struct imx_rproc *priv) > return ret; > } > > - if (!(val & dcfg->src_stop)) { > - priv->rproc->state = RPROC_DETACHED; > + if (!(val & dcfg->src_stop)) > priv->mode = IMX_RPROC_EARLY_BOOT; > - } > } > > + if (dcfg->method == IMX_RPROC_NONE) > + priv->mode = IMX_RPROC_EARLY_BOOT; As I pointed out there is no need for priv->mode. Just declare a boolean variable that is local to this function and use it to determine the state of the remote processor: if (dcfg->method == IMX_RPROC_NONE) early_boot = true; if (early_boot) priv->rproc->state = RPROC_DETACHED; > + > + if (priv->mode == IMX_RPROC_EARLY_BOOT) > + priv->rproc->state = RPROC_DETACHED; > + > return 0; > } > > @@ -724,6 +742,7 @@ static int imx_rproc_remove(struct platform_device *pdev) > } > > static const struct of_device_id imx_rproc_of_match[] = { > + { .compatible = "fsl,imx7ulp-cm4", .data = &imx_rproc_cfg_imx7ulp }, > { .compatible = "fsl,imx7d-cm4", .data = &imx_rproc_cfg_imx7d }, > { .compatible = "fsl,imx6sx-cm4", .data = &imx_rproc_cfg_imx6sx }, > { .compatible = "fsl,imx8mq-cm4", .data = &imx_rproc_cfg_imx8mq }, > -- > 2.30.0 >