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[23.128.96.18]) by mx.google.com with ESMTP id h12si1226881pjk.54.2021.04.14.17.23.15; Wed, 14 Apr 2021 17:23:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233721AbhDNMnX (ORCPT + 99 others); Wed, 14 Apr 2021 08:43:23 -0400 Received: from mail.kernel.org ([198.145.29.99]:34832 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233671AbhDNMnW (ORCPT ); Wed, 14 Apr 2021 08:43:22 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id C2FBE61155; Wed, 14 Apr 2021 12:43:01 +0000 (UTC) Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94) (envelope-from ) id 1lWerD-007QuU-MK; Wed, 14 Apr 2021 13:42:59 +0100 Date: Wed, 14 Apr 2021 13:42:53 +0100 Message-ID: <871rbdt4tu.wl-maz@kernel.org> From: Marc Zyngier To: Peter Geis Cc: Thomas Gleixner , "open list:ARM/Rockchip SoC..." , Linux Kernel Mailing List Subject: Re: [RFC] ITS fails to allocate on rk3568/rk3566 In-Reply-To: References: <871rbeo7wf.wl-maz@kernel.org> <87y2dmmggt.wl-maz@kernel.org> <87tuoambdb.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: pgwipeout@gmail.com, tglx@linutronix.de, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 14 Apr 2021 12:41:20 +0100, Peter Geis wrote: > > On Tue, Apr 13, 2021 at 11:51 AM Marc Zyngier wrote: > > > > On Tue, 13 Apr 2021 16:03:51 +0100, > > Peter Geis wrote: > > > > > > On Tue, Apr 13, 2021 at 10:01 AM Marc Zyngier wrote: > > > > [...] > > > > > > What happens if you hack all the allocations to happen in the low 4GB > > > > of the PA space? > > > > > > It seems to work correctly. > > > The downstream hacks used GFP_DMA32 which gets discarded by > > > kmalloc_fix_flags on certain allocations. > > > Switching to GFP_DMA seems to have satisfied it, but it feels wrong > > > using this code. > > > Need to check the corner cases to make sure I'm not missing something. > > > > The problem is that GFP_DMA doesn't always mean the same thing. > > Overall, we need to hear from Rockchip about the exact nature of the > > problem, and then we *may* be able to work something out. > > From what I've read, GFP_DMA allocates as low as possible, while > GFP_DMA32 ensures it's in the 32 bit address range, am I understanding > this correctly? ZONE_DMA{,32} aren't necessarily selected, and can vary in size (some equally broken systems can only DMA over 30bits...). > Is there a reason GFP_DMA is permitted while GFP_DMA32 is not, aside > from backwards compatibility? (I saw the notes about how we aren't > really supposed to rely on these flags) They are completely independent, and they can either be selected or not. And plenty of systems do not have any memory in the low 4GB. FWIW, one of my main machines has its first byte of RAM at 1TB. Which means that supporting this system is going to require some very specific handling. > I've also confirmed that their disabling shareability and caching is > necessary. Confirmed how? For which tables? We really cannot guess this kind of thing. > > I'd also like to understand whether it is broken because you happen to > > have pre-release silicon that will never make it into the wild, or if > > this is the real thing that is going to ship on millions of devices. > > My understanding is these chips are samples prior to the full > production run, but we are waiting on official comment from Rockchip > about this particular errata. OK. Please let me know once you get a full description of the problem from Rockchip. We will also need an official erratum number for this if this is to be worked around in mainline. M. -- Without deviation from the norm, progress is not possible.