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Date:   Thu, 15 Apr 2021 17:47:25 +0300
From:   Laurent Pinchart <laurent.pinchart@ideasonboard.com>
To:     Jacopo Mondi <jacopo+renesas@jmondi.org>
Cc:     Geert Uytterhoeven <geert+renesas@glider.be>,
        Magnus Damm <magnus.damm@gmail.com>,
        Kieran Bingham <kieran.bingham@ideasonboard.com>,
        Rob Herring <robh+dt@kernel.org>,
        linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 4/7] arm64: dts: renesas: r8a77970: Add csi40 port@0
Message-ID: <YHhR/YR6Ecp6yU4D@pendragon.ideasonboard.com>
References: <20210415122602.87697-1-jacopo+renesas@jmondi.org>
 <20210415122602.87697-5-jacopo+renesas@jmondi.org>
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In-Reply-To: <20210415122602.87697-5-jacopo+renesas@jmondi.org>
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Hi Jacopo,

Thank you for the patch.

On Thu, Apr 15, 2021 at 02:25:59PM +0200, Jacopo Mondi wrote:
> Declare port@0 in the csi40 device node and leave it un-connected.
> Each board .dts file will connect the port as it requires.
> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

The port exists at the hardware level, so including it here sounds good.
The DT binding even makes the port mandatory :-)

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

> ---
>  arch/arm64/boot/dts/renesas/r8a77970.dtsi | 4 ++++
>  1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> index 5a5d5649332a..e8f6352c3665 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
> @@ -1106,6 +1106,10 @@ ports {
>  				#address-cells = <1>;
>  				#size-cells = <0>;
>  
> +				port@0 {
> +					reg = <0>;
> +				};
> +
>  				port@1 {
>  					#address-cells = <1>;
>  					#size-cells = <0>;

-- 
Regards,

Laurent Pinchart