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([2600:1010:b016:5472:f478:f987:b4dd:abc9]) by smtp.gmail.com with ESMTPSA id e4sm2894211pgu.89.2021.04.15.10.38.20 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 15 Apr 2021 10:38:20 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable From: Andy Lutomirski Mime-Version: 1.0 (1.0) Subject: Re: Candidate Linux ABI for Intel AMX and hypothetical new related features Date: Thu, 15 Apr 2021 10:38:19 -0700 Message-Id: References: <25f1cca7-fba7-63c1-f11d-17a3069a9ceb@intel.com> Cc: Andy Lutomirski , Len Brown , Willy Tarreau , Florian Weimer , "Bae, Chang Seok" , X86 ML , LKML , linux-abi@vger.kernel.org, libc-alpha@sourceware.org, Rich Felker , Kyle Huey , Keno Fischer In-Reply-To: <25f1cca7-fba7-63c1-f11d-17a3069a9ceb@intel.com> To: Dave Hansen X-Mailer: iPhone Mail (18D70) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > On Apr 15, 2021, at 10:00 AM, Dave Hansen wrote: >=20 > =EF=BB=BFOn 4/15/21 9:24 AM, Andy Lutomirski wrote: >> In the patches, *as submitted*, if you trip the XFD #NM *once* and you >> are the only thread on the system to do so, you will eat the cost of a >> WRMSR on every subsequent context switch. >=20 > I think you're saying: If a thread trips XFD #NM *once*, every switch to > and from *that* thread will incur the WRMSR cost. Indeed. My sentence was missing a few words at the end. >=20 > The first time I read this, I thought you were saying that all threads > would incur a WRMSR cost on every context switch. If that's the case, I > grossly misread the patches. :)