Received: by 2002:a05:6a10:17d3:0:0:0:0 with SMTP id hz19csp127962pxb; Fri, 16 Apr 2021 01:12:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxAgthvdaVkU1d/slXWXZSlM/EyUpo2/AUErqDaHyu7L3bW6B732HjUb36BoTA2ap8/n85t X-Received: by 2002:a63:2c92:: with SMTP id s140mr4604835pgs.39.1618560763260; Fri, 16 Apr 2021 01:12:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1618560763; cv=none; d=google.com; s=arc-20160816; b=Jf6qBQ5/caDRKYhuf1WBt0cBFG857hHybScHFkg4fVTmqsXf2MF6qAeMTwlfFmK8aX 9CITpHfUNiuH/ccP+oAnUvmeAN8hEMqPB8sx7mADFIMIwNY4ICmO4Ksz9ArsrzdKu7g8 hjTBsNEQ60MbcgOMWoxXYBTs/LTkUNjS4GqABb03uPHzVdNA9Jls/Wfe/jgdjTJuN1ed BhWKwiHXxxGjwhdmNfURivN/1UzdAyfojZD9f0lOqdzbLzne4kv8JmyEYckfZPGB6Gi9 xkwjCYEKClm5WAAj58d/3LyNCj1VMLJ5bnX6Ksp6txx4FfRxRUKMwNnXEEfPzmy1d/ME jEKA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=D49LFH/UPrNvRKg8ZlGsBAKa6kjJVgk9sLYM0yrq/TE=; b=0BmRZWFav39mgBXXsZ1DoDeD+mt+hUp1hlIwnNQYv6+K6xbJJncmwWBFpN6QmqA8c2 sD96wqhqrX7R47NXczqhVvQV19We775jscWHgyN+ZqAbHVg1AO5SL16xWdfRoyV1mvv3 EaagkRbxiITcgthYdc4/n2qlYKsybc1uMkxL69O5fgMG0qhN8dmRSEoRdK61CFRJ8BFA NmWrDZf5MjUXb1jwJRbHEtvIE6ye3UbmU/N88VCVxnEqmFK7xsOxg7vk/XTIStFdtm2p qY53AuMXntJJXaYEhpd+60tzZV78mnwMvx9hrotikrBytt/k2hXxZWl4S/QRr8yqHK96 Wg+A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=cBbkJIjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id u133si5564009pgc.332.2021.04.16.01.12.08; Fri, 16 Apr 2021 01:12:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=cBbkJIjH; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240166AbhDPIIu (ORCPT + 99 others); Fri, 16 Apr 2021 04:08:50 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238954AbhDPIIt (ORCPT ); Fri, 16 Apr 2021 04:08:49 -0400 Received: from mail-ed1-x52d.google.com (mail-ed1-x52d.google.com [IPv6:2a00:1450:4864:20::52d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 10DAEC061574; Fri, 16 Apr 2021 01:08:24 -0700 (PDT) Received: by mail-ed1-x52d.google.com with SMTP id x4so31213664edd.2; Fri, 16 Apr 2021 01:08:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=D49LFH/UPrNvRKg8ZlGsBAKa6kjJVgk9sLYM0yrq/TE=; b=cBbkJIjHuvueBRnRvyCEeZSLgzjiqE8ZUMQLdl5GGELKL71cPPt6mNTJAyyt9JKg9k mms7KZx04ZYMd4OsX+XIKw/mLT6KpSl5F1sp67y/XpE7mKkFb0ZOxNWCy4HLc+GRRYOx d4B1akX8Q+Hq0zgL9oxMPqIuTuFQn+ZArpCdZuWM8D9ix2XATYnqrzcAPLyA/D16rs2z ySuVb3ZNF7Xisj9MuanbxGZxI7gu6WwFDYGbWyk0eFi5T/8a7/NxoNRHwd6JnIaPgd2y Gf1E7HhTTiW745fDstQtsSPqjU2rWEjEJlHD6L0MRSkRt0ltc522k/nZoiCAdihMPbM+ 82Mg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=D49LFH/UPrNvRKg8ZlGsBAKa6kjJVgk9sLYM0yrq/TE=; b=WWf1hqr00lJCrNLZVHH4ZqXpbApBfAcnCIcBYrFpqjj2TJr8l7yAhVWZn/O8qen/Qg Gx3hGchrnbn7pTo8bMhRD/M6qgHdsSQj3/WyVe8PDG6SSdnyT3V5uKZQAtpAlCz+0Oym yMsXGdeKOHV9oeG7mESMYT0xeguW47qZNjoPI6rBPQddr4UhQrpp+vci4F4orHMUtTmk 8Rrq/74IfNuYmF7tzp0UKIiWYOLbyymm6Fy955JaFJJ+S3GZJb3w6J8OkJywJorVNT1Q RJTbsLyyqn2PzHczy11fA2k+d756kHBfLMqUokc5qlbiSSwJk/NloUCEzVNJZhG5e2nB 2wew== X-Gm-Message-State: AOAM533QswGnzVeq2+kS9hm3kSrWGhkniM9CUX+6yxzIQlBs5l+kFkF3 sCSqw5/U2LM6y2r0iI12/jY= X-Received: by 2002:a05:6402:1588:: with SMTP id c8mr7380552edv.37.1618560502704; Fri, 16 Apr 2021 01:08:22 -0700 (PDT) Received: from debian.home (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id q16sm4672303edv.61.2021.04.16.01.07.57 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Fri, 16 Apr 2021 01:08:22 -0700 (PDT) From: Johan Jonker To: heiko@sntech.de Cc: robh+dt@kernel.org, zhangqing@rock-chips.com, enric.balletbo@collabora.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v8 13/15] dt-bindings: power: rockchip: Convert to json-schema Date: Fri, 16 Apr 2021 10:03:40 +0200 Message-Id: <20210416080342.18614-14-jbx6244@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20210416080342.18614-1-jbx6244@gmail.com> References: <20210416080342.18614-1-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Enric Balletbo i Serra Convert the soc/rockchip/power_domain.txt binding document to json-schema and move to the power bindings directory. Signed-off-by: Enric Balletbo i Serra Signed-off-by: Elaine Zhang Signed-off-by: Johan Jonker --- Note for rob+dt: A tag was not added on purpose, because: Add "rockchip," prefix to the qos compatible name in example. Changed maintainers. Size reg description is reduced. Little style changes '' to "" Please have a look at it again. For some SoC nodes this patch serie generates notifications for undocumented "assigned-clocks" and "assigned-clock-parents" properties till there is consensus of what to do with it. --- Changed V8: Add pd-node ref schema Changed V7: Fix commit message and author format Changed SPDX-License-Identifier back to GPL-2.0 Remove "clocks", "assigned-clocks" and "assigned-clock-parents" Fix indent example Changed V6: Changed author Changed V5: Change SPDX-License-Identifier to GPL-2.0-only OR BSD-2-Clause Remove a maintainer Changed patternProperties to power-domain Add "clocks", "assigned-clocks" and "assigned-clock-parents" Changed V4: Remove new compatible string Style changes '' to "" Changed V3: Use Enric's conversion with rk3399 example Changed V2: Convert power_domain.txt to YAML with rk3568 example --- .../bindings/power/rockchip,power-controller.yaml | 257 +++++++++++++++++++++ .../bindings/soc/rockchip/power_domain.txt | 136 ----------- 2 files changed, 257 insertions(+), 136 deletions(-) create mode 100644 Documentation/devicetree/bindings/power/rockchip,power-controller.yaml delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/power_domain.txt diff --git a/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml new file mode 100644 index 000000000..2b9950fd6 --- /dev/null +++ b/Documentation/devicetree/bindings/power/rockchip,power-controller.yaml @@ -0,0 +1,257 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/rockchip,power-controller.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip Power Domains + +maintainers: + - Elaine Zhang + - Heiko Stuebner + +description: | + Rockchip processors include support for multiple power domains + which can be powered up/down by software based on different + application scenarios to save power. + + Power domains contained within power-controller node are + generic power domain providers documented in + Documentation/devicetree/bindings/power/power-domain.yaml. + + IP cores belonging to a power domain should contain a + "power-domains" property that is a phandle for the + power domain node representing the domain. + +properties: + $nodename: + const: power-controller + + compatible: + enum: + - rockchip,px30-power-controller + - rockchip,rk3036-power-controller + - rockchip,rk3066-power-controller + - rockchip,rk3128-power-controller + - rockchip,rk3188-power-controller + - rockchip,rk3228-power-controller + - rockchip,rk3288-power-controller + - rockchip,rk3328-power-controller + - rockchip,rk3366-power-controller + - rockchip,rk3368-power-controller + - rockchip,rk3399-power-controller + + "#power-domain-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +patternProperties: + "^power-domain@[0-9a-f]+$": + properties: + + "#power-domain-cells": + enum: [0, 1] + description: + Must be 0 for nodes representing a single PM domain and 1 for nodes + providing multiple PM domains. + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + $ref: "#/definitions/pd-node" + + patternProperties: + "^power-domain@[0-9a-f]+$": + properties: + + "#power-domain-cells": + enum: [0, 1] + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + $ref: "#/definitions/pd-node" + + patternProperties: + "^power-domain@[0-9a-f]+$": + properties: + + "#power-domain-cells": + const: 0 + + $ref: "#/definitions/pd-node" + + required: + - "#power-domain-cells" + + unevaluatedProperties: false + + required: + - "#power-domain-cells" + + unevaluatedProperties: false + + required: + - "#power-domain-cells" + + unevaluatedProperties: false + +required: + - compatible + - "#power-domain-cells" + +additionalProperties: false + +definitions: + pd-node: + type: object + description: | + Represents the power domains within the power controller node. + + properties: + reg: + maxItems: 1 + description: | + Power domain index. Valid values are defined in + "include/dt-bindings/power/px30-power.h" + "include/dt-bindings/power/rk3036-power.h" + "include/dt-bindings/power/rk3066-power.h" + "include/dt-bindings/power/rk3128-power.h" + "include/dt-bindings/power/rk3188-power.h" + "include/dt-bindings/power/rk3228-power.h" + "include/dt-bindings/power/rk3288-power.h" + "include/dt-bindings/power/rk3328-power.h" + "include/dt-bindings/power/rk3366-power.h" + "include/dt-bindings/power/rk3368-power.h" + "include/dt-bindings/power/rk3399-power.h" + + clocks: + minItems: 1 + maxItems: 30 + description: | + A number of phandles to clocks that need to be enabled + while power domain switches state. + + pm_qos: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + A number of phandles to qos blocks which need to be saved and restored + while power domain switches state. + + required: + - reg + +examples: + - | + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + qos_hdcp: qos@ffa90000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffa90000 0x0 0x20>; + }; + + qos_iep: qos@ffa98000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffa98000 0x0 0x20>; + }; + + qos_rga_r: qos@ffab0000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab0000 0x0 0x20>; + }; + + qos_rga_w: qos@ffab0080 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab0080 0x0 0x20>; + }; + + qos_video_m0: qos@ffab8000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffab8000 0x0 0x20>; + }; + + qos_video_m1_r: qos@ffac0000 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffac0000 0x0 0x20>; + }; + + qos_video_m1_w: qos@ffac0080 { + compatible = "rockchip,rk3399-qos", "syscon"; + reg = <0x0 0xffac0080 0x0 0x20>; + }; + + power-management@ff310000 { + compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd"; + reg = <0x0 0xff310000 0x0 0x1000>; + + power-controller { + compatible = "rockchip,rk3399-power-controller"; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + /* These power domains are grouped by VD_CENTER */ + power-domain@RK3399_PD_IEP { + reg = ; + clocks = <&cru ACLK_IEP>, + <&cru HCLK_IEP>; + pm_qos = <&qos_iep>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_RGA { + reg = ; + clocks = <&cru ACLK_RGA>, + <&cru HCLK_RGA>; + pm_qos = <&qos_rga_r>, + <&qos_rga_w>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VCODEC { + reg = ; + clocks = <&cru ACLK_VCODEC>, + <&cru HCLK_VCODEC>; + pm_qos = <&qos_video_m0>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VDU { + reg = ; + clocks = <&cru ACLK_VDU>, + <&cru HCLK_VDU>; + pm_qos = <&qos_video_m1_r>, + <&qos_video_m1_w>; + #power-domain-cells = <0>; + }; + power-domain@RK3399_PD_VIO { + reg = ; + #power-domain-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@RK3399_PD_HDCP { + reg = ; + clocks = <&cru ACLK_HDCP>, + <&cru HCLK_HDCP>, + <&cru PCLK_HDCP>; + pm_qos = <&qos_hdcp>; + #power-domain-cells = <0>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt b/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt deleted file mode 100644 index 8304eceb6..000000000 --- a/Documentation/devicetree/bindings/soc/rockchip/power_domain.txt +++ /dev/null @@ -1,136 +0,0 @@ -* Rockchip Power Domains - -Rockchip processors include support for multiple power domains which can be -powered up/down by software based on different application scenes to save power. - -Required properties for power domain controller: -- compatible: Should be one of the following. - "rockchip,px30-power-controller" - for PX30 SoCs. - "rockchip,rk3036-power-controller" - for RK3036 SoCs. - "rockchip,rk3066-power-controller" - for RK3066 SoCs. - "rockchip,rk3128-power-controller" - for RK3128 SoCs. - "rockchip,rk3188-power-controller" - for RK3188 SoCs. - "rockchip,rk3228-power-controller" - for RK3228 SoCs. - "rockchip,rk3288-power-controller" - for RK3288 SoCs. - "rockchip,rk3328-power-controller" - for RK3328 SoCs. - "rockchip,rk3366-power-controller" - for RK3366 SoCs. - "rockchip,rk3368-power-controller" - for RK3368 SoCs. - "rockchip,rk3399-power-controller" - for RK3399 SoCs. -- #power-domain-cells: Number of cells in a power-domain specifier. - Should be 1 for multiple PM domains. -- #address-cells: Should be 1. -- #size-cells: Should be 0. - -Required properties for power domain sub nodes: -- reg: index of the power domain, should use macros in: - "include/dt-bindings/power/px30-power.h" - for PX30 type power domain. - "include/dt-bindings/power/rk3036-power.h" - for RK3036 type power domain. - "include/dt-bindings/power/rk3066-power.h" - for RK3066 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for RK3128 type power domain. - "include/dt-bindings/power/rk3188-power.h" - for RK3188 type power domain. - "include/dt-bindings/power/rk3228-power.h" - for RK3228 type power domain. - "include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain. - "include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain. - "include/dt-bindings/power/rk3366-power.h" - for RK3366 type power domain. - "include/dt-bindings/power/rk3368-power.h" - for RK3368 type power domain. - "include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain. -- clocks (optional): phandles to clocks which need to be enabled while power domain - switches state. -- pm_qos (optional): phandles to qos blocks which need to be saved and restored - while power domain switches state. - -Qos Example: - - qos_gpu: qos_gpu@ffaf0000 { - compatible ="syscon"; - reg = <0x0 0xffaf0000 0x0 0x20>; - }; - -Example: - - power: power-controller { - compatible = "rockchip,rk3288-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_gpu { - reg = ; - clocks = <&cru ACLK_GPU>; - pm_qos = <&qos_gpu>; - }; - }; - - power: power-controller { - compatible = "rockchip,rk3368-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_gpu_1 { - reg = ; - clocks = <&cru ACLK_GPU_CFG>; - }; - }; - -Example 2: - power: power-controller { - compatible = "rockchip,rk3399-power-controller"; - #power-domain-cells = <1>; - #address-cells = <1>; - #size-cells = <0>; - - pd_vio { - #address-cells = <1>; - #size-cells = <0>; - reg = ; - - pd_vo { - #address-cells = <1>; - #size-cells = <0>; - reg = ; - - pd_vopb { - reg = ; - }; - - pd_vopl { - reg = ; - }; - }; - }; - }; - -Node of a device using power domains must have a power-domains property, -containing a phandle to the power device node and an index specifying which -power domain to use. -The index should use macros in: - "include/dt-bindings/power/px30-power.h" - for px30 type power domain. - "include/dt-bindings/power/rk3036-power.h" - for rk3036 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for rk3128 type power domain. - "include/dt-bindings/power/rk3128-power.h" - for rk3228 type power domain. - "include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain. - "include/dt-bindings/power/rk3328-power.h" - for rk3328 type power domain. - "include/dt-bindings/power/rk3366-power.h" - for rk3366 type power domain. - "include/dt-bindings/power/rk3368-power.h" - for rk3368 type power domain. - "include/dt-bindings/power/rk3399-power.h" - for rk3399 type power domain. - -Example of the node using power domain: - - node { - /* ... */ - power-domains = <&power RK3288_PD_GPU>; - /* ... */ - }; - - node { - /* ... */ - power-domains = <&power RK3368_PD_GPU_1>; - /* ... */ - }; - - node { - /* ... */ - power-domains = <&power RK3399_PD_VOPB>; - /* ... */ - }; -- 2.11.0