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[23.128.96.18]) by mx.google.com with ESMTP id v15si1020187edr.396.2021.04.16.01.54.20; Fri, 16 Apr 2021 01:54:43 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241474AbhDPIxG (ORCPT + 99 others); Fri, 16 Apr 2021 04:53:06 -0400 Received: from mx2.suse.de ([195.135.220.15]:54124 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240974AbhDPIwj (ORCPT ); Fri, 16 Apr 2021 04:52:39 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id B3CECAF42; Fri, 16 Apr 2021 08:52:13 +0000 (UTC) From: Thomas Bogendoerfer To: "David S. Miller" , Jakub Kicinski , Rob Herring , netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org Subject: [PATCH v5 net-next 08/10] net: korina: Get mdio input clock via common clock framework Date: Fri, 16 Apr 2021 10:52:04 +0200 Message-Id: <20210416085207.63181-9-tsbogend@alpha.franken.de> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210416085207.63181-1-tsbogend@alpha.franken.de> References: <20210416085207.63181-1-tsbogend@alpha.franken.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org With device tree clock is provided via CCF. For non device tree use a maximum clock value to not overclock the PHY. The non device tree usage will go away after platform is converted to DT. Signed-off-by: Thomas Bogendoerfer --- drivers/net/ethernet/korina.c | 21 +++++++++++++++------ 1 file changed, 15 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/korina.c b/drivers/net/ethernet/korina.c index cd078a5c679b..e95c8d87d893 100644 --- a/drivers/net/ethernet/korina.c +++ b/drivers/net/ethernet/korina.c @@ -57,14 +57,13 @@ #include #include #include +#include #include #include #include #include -#include -#include #include #include @@ -146,10 +145,9 @@ struct korina_private { struct work_struct restart_task; struct net_device *dev; struct device *dmadev; + int mii_clock_freq; }; -extern unsigned int idt_cpu_freq; - static dma_addr_t korina_tx_dma(struct korina_private *lp, int idx) { return lp->td_dma + (idx * sizeof(struct dma_desc)); @@ -899,8 +897,8 @@ static int korina_init(struct net_device *dev) /* Management Clock Prescaler Divisor * Clock independent setting */ - writel(((idt_cpu_freq) / MII_CLOCK + 1) & ~1, - &lp->eth_regs->ethmcp); + writel(((lp->mii_clock_freq) / MII_CLOCK + 1) & ~1, + &lp->eth_regs->ethmcp); writel(0, &lp->eth_regs->miimcfg); /* don't transmit until fifo contains 48b */ @@ -1060,6 +1058,7 @@ static int korina_probe(struct platform_device *pdev) u8 *mac_addr = dev_get_platdata(&pdev->dev); struct korina_private *lp; struct net_device *dev; + struct clk *clk; void __iomem *p; int rc; @@ -1077,6 +1076,16 @@ static int korina_probe(struct platform_device *pdev) eth_hw_addr_random(dev); } + clk = devm_clk_get_optional(&pdev->dev, "mdioclk"); + if (IS_ERR(clk)) + return PTR_ERR(clk); + if (clk) { + clk_prepare_enable(clk); + lp->mii_clock_freq = clk_get_rate(clk); + } else { + lp->mii_clock_freq = 200000000; /* max possible input clk */ + } + lp->rx_irq = platform_get_irq_byname(pdev, "korina_rx"); lp->tx_irq = platform_get_irq_byname(pdev, "korina_tx"); -- 2.29.2