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R. Silva" , Mark Brown , Pi-Hsun Shih , Utkarsh Patel , Yu-Hsuan Hsu Subject: [PATCH v2 1/2] platform/chrome: cros_ec: Add Type C hard reset Date: Fri, 16 Apr 2021 11:27:33 -0700 Message-Id: <20210416182739.2938473-1-pmalani@chromium.org> X-Mailer: git-send-email 2.31.1.368.gbe11c130af-goog MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update the EC command header to include the new event bit. This bit is included in the latest version of the Chrome EC headers[1]. [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h Change-Id: I52a36e725d945665814d4e59ddd1e76a3692db9f --- v2 is the first version the patch was introduced. include/linux/platform_data/cros_ec_commands.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h index 5ff8597ceabd..9156078c6fc6 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity { #define PD_STATUS_EVENT_SOP_DISC_DONE BIT(0) #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE BIT(1) +#define PD_STATUS_EVENT_HARD_RESET BIT(2) struct ec_params_typec_status { uint8_t port; -- 2.31.1.368.gbe11c130af-goog