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Subject: Re: [PATCH v2] irqchip/xilinx: Expose Kconfig option for Zynq/ZynqMP
To:     Robert Hancock <robert.hancock@calian.com>, <tglx@linutronix.de>,
        <maz@kernel.org>
CC:     <michal.simek@xilinx.com>, <linux-kernel@vger.kernel.org>,
        <anirudh@xilinx.com>
References: <20210419194245.210550-1-robert.hancock@calian.com>
From:   Michal Simek <michal.simek@xilinx.com>
Message-ID: <06726d96-1c65-caec-f539-c694eebde22b@xilinx.com>
Date:   Tue, 20 Apr 2021 08:19:39 +0200
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On 4/19/21 9:42 PM, Robert Hancock wrote:
> Previously the XILINX_INTC config option was hidden and only
> auto-selected on the MicroBlaze platform. However, this IP can also be
> used on the Zynq and ZynqMP platforms as a secondary cascaded
> controller. Allow this option to be user-enabled on those platforms.
> 
> Signed-off-by: Robert Hancock <robert.hancock@calian.com>
> ---
>  drivers/irqchip/Kconfig | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig
> index 15536e321df5..1020cc5a7800 100644
> --- a/drivers/irqchip/Kconfig
> +++ b/drivers/irqchip/Kconfig
> @@ -279,8 +279,13 @@ config XTENSA_MX
>  	select GENERIC_IRQ_EFFECTIVE_AFF_MASK
>  
>  config XILINX_INTC
> -	bool
> +	bool "Xilinx Interrupt Controller IP"
> +	depends on MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || COMPILE_TEST
>  	select IRQ_DOMAIN
> +	help
> +	  Support for the Xilinx Interrupt Controller IP core.
> +	  This is used as a primary controller with MicroBlaze and can also
> +	  be used as a secondary chained controller on other platforms.
>  
>  config IRQ_CROSSBAR
>  	bool
> 

Acked-by: Michal Simek <michal.simek@xilinx.com>

Thanks,
Michal