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Subject: Re: [PATCH v2 1/2] platform/chrome: cros_ec: Add Type C hard reset
To:     Prashant Malani <pmalani@chromium.org>,
        linux-kernel@vger.kernel.org
Cc:     Benson Leung <bleung@chromium.org>,
        Guenter Roeck <groeck@chromium.org>,
        "Gustavo A. R. Silva" <gustavoars@kernel.org>,
        Mark Brown <broonie@kernel.org>,
        Pi-Hsun Shih <pihsun@chromium.org>,
        Utkarsh Patel <utkarsh.h.patel@intel.com>,
        Yu-Hsuan Hsu <yuhsuan@chromium.org>
References: <20210416182739.2938473-1-pmalani@chromium.org>
From:   Enric Balletbo i Serra <enric.balletbo@collabora.com>
Message-ID: <172e5982-5544-7170-4c88-95e196e28fac@collabora.com>
Date:   Tue, 20 Apr 2021 12:00:24 +0200
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Hi Prashant,

On 16/4/21 20:27, Prashant Malani wrote:
> Update the EC command header to include the new event bit. This bit
> is included in the latest version of the Chrome EC headers[1].
> 
> [1] https://chromium.googlesource.com/chromiumos/platform/ec/+/refs/heads/main/include/ec_commands.h
> 
> Change-Id: I52a36e725d945665814d4e59ddd1e76a3692db9f

Please remember to remove the ChromeOS specific tags and add properly the Signed-off

Thanks,
 Enric

> ---
> v2 is the first version the patch was introduced.
> 
>  include/linux/platform_data/cros_ec_commands.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux/platform_data/cros_ec_commands.h
> index 5ff8597ceabd..9156078c6fc6 100644
> --- a/include/linux/platform_data/cros_ec_commands.h
> +++ b/include/linux/platform_data/cros_ec_commands.h
> @@ -5678,6 +5678,7 @@ enum tcpc_cc_polarity {
>  
>  #define PD_STATUS_EVENT_SOP_DISC_DONE		BIT(0)
>  #define PD_STATUS_EVENT_SOP_PRIME_DISC_DONE	BIT(1)
> +#define PD_STATUS_EVENT_HARD_RESET		BIT(2)
>  
>  struct ec_params_typec_status {
>  	uint8_t port;
>