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Subject: Re: [PATCH v9 03/13] media: hantro: Use syscon instead of 'ctrl'
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To:     Benjamin Gaignard <benjamin.gaignard@collabora.com>,
        Lucas Stach <l.stach@pengutronix.de>, ezequiel@collabora.com,
        p.zabel@pengutronix.de, mchehab@kernel.org, robh+dt@kernel.org,
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        mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org,
        jernej.skrabec@siol.net, emil.l.velikov@gmail.com,
        "Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
        Jacky Bai <ping.bai@nxp.com>
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From:   Hans Verkuil <hverkuil-cisco@xs4all.nl>
Message-ID: <0f23d42e-b858-c57d-3bf7-32b511e919d1@xs4all.nl>
Date:   Tue, 20 Apr 2021 13:35:50 +0200
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On 20/04/2021 11:31, Benjamin Gaignard wrote:
> 
> Le 20/04/2021 à 11:16, Hans Verkuil a écrit :
>> On 20/04/2021 11:10, Benjamin Gaignard wrote:
>>> Le 16/04/2021 à 17:14, Lucas Stach a écrit :
>>>> Am Freitag, dem 16.04.2021 um 15:08 +0200 schrieb Benjamin Gaignard:
>>>>> Le 16/04/2021 à 12:54, Lucas Stach a écrit :
>>>>>> Am Mittwoch, dem 07.04.2021 um 09:35 +0200 schrieb Benjamin Gaignard:
>>>>>>> In order to be able to share the control hardware block between
>>>>>>> VPUs use a syscon instead a ioremap it in the driver.
>>>>>>> To keep the compatibility with older DT if 'nxp,imx8mq-vpu-ctrl'
>>>>>>> phandle is not found look at 'ctrl' reg-name.
>>>>>>> With the method it becomes useless to provide a list of register
>>>>>>> names so remove it.
>>>>>> Sorry for putting a spoke in the wheel after many iterations of the
>>>>>> series.
>>>>>>
>>>>>> We just discussed a way forward on how to handle the clocks and resets
>>>>>> provided by the blkctl block on i.MX8MM and later and it seems there is
>>>>>> a consensus on trying to provide virtual power domains from a blkctl
>>>>>> driver, controlling clocks and resets for the devices in the power
>>>>>> domain. I would like to avoid introducing yet another way of handling
>>>>>> the blkctl and thus would like to align the i.MX8MQ VPU blkctl with
>>>>>> what we are planning to do on the later chip generations.
>>>>>>
>>>>>> CC'ing Jacky Bai and Peng Fan from NXP, as they were going to give this
>>>>>> virtual power domain thing a shot.
>>>>> That could replace the 3 first patches and Dt patche of this series
>>>>> but that will not impact the hevc part, so I wonder if pure hevc patches
>>>>> could be merged anyway ?
>>>>> They are reviewed and don't depend of how the ctrl block is managed.
>>>> I'm not really in a position to give any informed opinion about that
>>>> hvec patches, as I only skimmed them, but I don't see any reason to
>>>> delay patches 04-11 from this series until the i.MX8M platform issues
>>>> are sorted. AFAICS those things are totally orthogonal.
>>> Hi Hans,
>>> What do you think about this proposal to split this series ?
>>> Get hevc part merged could allow me to continue to add features
>>> like scaling lists, compressed reference buffers and 10-bit supports.
>> Makes sense to me!
> 
> Great !
> If the latest version match your expectations how would you like to processed ?
> Can you merged patches 4 to 12 ? or should I resend them in a new shorted series ?

A separate patch series would be easier for me.

Regards,

	Hans

> 
> Regards,
> Benjamin
> 
>>
>> Regards,
>>
>> 	Hans
>>