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From:   Michael Ellerman <patch-notifications@ellerman.id.au>
To:     Athira Rajeev <atrajeev@linux.vnet.ibm.com>, acme@kernel.org,
        linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
        jolsa@kernel.org, mpe@ellerman.id.au,
        linux-perf-users@vger.kernel.org
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        maddy@linux.ibm.com, kjain@linux.ibm.com, kan.liang@linux.intel.com
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Subject: Re: [PATCH V2 0/5] powerpc/perf: Export processor pipeline stage cycles information
Message-Id: <161901050007.1961279.2172742114670881645.b4-ty@ellerman.id.au>
Date:   Wed, 21 Apr 2021 23:08:20 +1000
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On Mon, 22 Mar 2021 10:57:22 -0400, Athira Rajeev wrote:
> Performance Monitoring Unit (PMU) registers in powerpc exports
> number of cycles elapsed between different stages in the pipeline.
> Example, sampling registers in ISA v3.1.
> 
> This patchset implements kernel and perf tools support to expose
> these pipeline stage cycles using the sample type PERF_SAMPLE_WEIGHT_TYPE.
> 
> [...]

Patch 1 applied to powerpc/next.

[1/5] powerpc/perf: Expose processor pipeline stage cycles using PERF_SAMPLE_WEIGHT_STRUCT
      https://git.kernel.org/powerpc/c/af31fd0c9107e400a8eb89d0eafb40bb78802f79

cheers