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From:   Liu Ying <victor.liu@nxp.com>
To:     dri-devel@lists.freedesktop.org
Cc:     linux-kernel@vger.kernel.org, a.hajda@samsung.com,
        narmstrong@baylibre.com, robert.foss@linaro.org,
        Laurent.pinchart@ideasonboard.com, jonas@kwiboo.se,
        jernej.skrabec@siol.net, airlied@linux.ie, daniel@ffwll.ch,
        agx@sigxcpu.org, robert.chiras@nxp.com, linux-imx@nxp.com
Subject: [PATCH v3 2/3] drm/bridge: nwl-dsi: Remove a check on unchanged HS clock rate from ->mode_set()
Date:   Fri, 23 Apr 2021 17:26:42 +0800
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 =?utf-8?B?Q28zTzJtNkY2UVY0RTlrS0hUMHRmaVZ6dEd1ZVRRSDhoUjZrRTJ1dHRJNENM?=
 =?utf-8?B?bVlzKytMelgwd3dFQktMOGtPOWZ6OUlBVVZkTnNsWk9ZaG5KSHhyUXR5MXQx?=
 =?utf-8?B?ZEU1SmU4Zm9tNVBWK05OTy9QQmdXNlpqdzFTeFR3TDhPbjNyRnY5TldBWW5O?=
 =?utf-8?B?SEVLOVZvQlp4NFFmRXhhS2xoUDFnV2tMc21vR0tHNnA5STdEMGNQejNvUUR5?=
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 =?utf-8?B?RnRPbm5FZlpxUEhQc0xDS0x6UUFvU04zeDNqWHAwNVluOWRmTFBNVWhzZm5F?=
 =?utf-8?B?Q2lyVFZlSW1CdExBc0cvSzNqLzYxeExTYlhlR2EzQnUxbHhTZHhiTytpemZO?=
 =?utf-8?B?NW5kSzEwOGptUTFBTlFMT2pwT0hPbWxyQnR5VlFMMEEwUVRsQm5reEN0M2k2?=
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 =?utf-8?B?cGpOampySDhUUkpzbTRvU1ZoMnVuODk4TGE0bFhzWmtCMldtYTJGajl0OEZL?=
 =?utf-8?B?Y00vNjFCUXQ4L3VPTHY3eWNKTmlNYzlZa2dydjJvQW1LOHlsajloVkZxVk15?=
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 =?utf-8?B?QzRKaXlQakhxOEdoWmRaZy85Vi9NUFlyU1VpSUF0cHRGaHYxeWFDYXdoUmxY?=
 =?utf-8?B?eUFMTS9kN3NYVnZFZVdZUFdnM2RCS0U5MHRhL1pNeTlXSEU5d3hMaHVpeXZP?=
 =?utf-8?B?c2JhK0J5MS9vTldNRFRPc3lva1RWa25xQk0xOFU1dTJ5a1ZvZ3RGVlJWbjY1?=
 =?utf-8?B?eC8vVzU1eDcrSnp6M1lMTzJMUm1UbGgrQS9hVDZod2puOXBPL1pOckxkUSsv?=
 =?utf-8?B?eks2SVNKbm9MaVgxajFwNzRUUjRVa1loM3NZT3JkdUZPenVZRW5MZVlDd3l1?=
 =?utf-8?B?TWdDZXU0TGd0VWx4WitXR0pkb2xMREdJTlAvYzZXaGdsbjVud2xsOGh6S3Zz?=
 =?utf-8?B?WlVzL0xSWVBoRUpyWFpMMlBBcTVTWVU0RlFvemtqcTV0VW56WXNRRnhqN3A2?=
 =?utf-8?B?cDlpNkhLMTlGMEFiTlcwZThkalRwSlBrcnpGUUt2Q0IyNER0cU1QRkRNZGFL?=
 =?utf-8?B?UmE5cU1UWFZQTno3SzZaVk5sTVptajhlOEdoeEpCYkZKbzc3Nzk1VXhNdS9O?=
 =?utf-8?Q?JvWrNShlNSN3/lA6yis3aRBkth1sQ1YnprI3hbm?=
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The check on unchanged HS clock rate in ->mode_set() improves
the callback's performance a bit by early return.  However,
the up-coming patch would get MIPI DSI controller and PHY ready
in ->mode_set() after that check, thus likely skipped.
So, this patch removes that check to make sure MIPI DSI controller
and PHY will be brought up and taken down from ->mode_set() and
->atomic_disable() respectively in pairs.

Cc: Andrzej Hajda <a.hajda@samsung.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Jonas Karlman <jonas@kwiboo.se>
Cc: Jernej Skrabec <jernej.skrabec@siol.net>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Guido Günther <agx@sigxcpu.org>
Cc: Robert Chiras <robert.chiras@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
v2->v3:
* Split from the single patch in v2 to clarify changes. (Neil)

 drivers/gpu/drm/bridge/nwl-dsi.c | 7 -------
 1 file changed, 7 deletions(-)

diff --git a/drivers/gpu/drm/bridge/nwl-dsi.c b/drivers/gpu/drm/bridge/nwl-dsi.c
index c65ca860712d2..601ccc4a7cdc7 100644
--- a/drivers/gpu/drm/bridge/nwl-dsi.c
+++ b/drivers/gpu/drm/bridge/nwl-dsi.c
@@ -856,13 +856,6 @@ nwl_dsi_bridge_mode_set(struct drm_bridge *bridge,
 	if (ret < 0)
 		return;
 
-	/*
-	 * If hs clock is unchanged, we're all good - all parameters are
-	 * derived from it atm.
-	 */
-	if (new_cfg.mipi_dphy.hs_clk_rate == dsi->phy_cfg.mipi_dphy.hs_clk_rate)
-		return;
-
 	phy_ref_rate = clk_get_rate(dsi->phy_ref_clk);
 	DRM_DEV_DEBUG_DRIVER(dev, "PHY at ref rate: %lu\n", phy_ref_rate);
 	/* Save the new desired phy config */
-- 
2.25.1