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Fri, 23 Apr 2021 12:43:43 +0000 From: "Radu Pirea (NXP OSS)" To: andrew@lunn.ch, hkallweit1@gmail.com, linux@armlinux.org.uk, davem@davemloft.net, kuba@kernel.org Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, "Radu Pirea (NXP OSS)" Subject: [PATCH] phy: nxp-c45-tja11xx: add interrupt support Date: Fri, 23 Apr 2021 15:43:29 +0300 Message-Id: <20210423124329.993850-1-radu-nicolae.pirea@oss.nxp.com> X-Mailer: git-send-email 2.31.1 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [89.45.21.213] X-ClientProxiedBy: AM0PR10CA0058.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:150::38) To VI1PR04MB5101.eurprd04.prod.outlook.com (2603:10a6:803:5f::31) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (89.45.21.213) by AM0PR10CA0058.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:150::38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4065.20 via Frontend Transport; Fri, 23 Apr 2021 12:43:42 +0000 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: b641c622-5f87-4406-6b48-08d906556da3 X-MS-TrafficTypeDiagnostic: VI1PR04MB4509: X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:124; 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Link event interrupt will trigger an interrupt every time when the link goes up or down. Signed-off-by: Radu Pirea (NXP OSS) --- drivers/net/phy/nxp-c45-tja11xx.c | 33 +++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/net/phy/nxp-c45-tja11xx.c b/drivers/net/phy/nxp-c45-tja11xx.c index 95307097ebff..54eb74e46cbe 100644 --- a/drivers/net/phy/nxp-c45-tja11xx.c +++ b/drivers/net/phy/nxp-c45-tja11xx.c @@ -28,6 +28,11 @@ #define DEVICE_CONTROL_CONFIG_GLOBAL_EN BIT(14) #define DEVICE_CONTROL_CONFIG_ALL_EN BIT(13) +#define VEND1_PHY_IRQ_ACK 0x80A0 +#define VEND1_PHY_IRQ_EN 0x80A1 +#define VEND1_PHY_IRQ_STATUS 0x80A2 +#define PHY_IRQ_LINK_EVENT BIT(1) + #define VEND1_PHY_CONTROL 0x8100 #define PHY_CONFIG_EN BIT(14) #define PHY_START_OP BIT(0) @@ -188,6 +193,32 @@ static int nxp_c45_start_op(struct phy_device *phydev) PHY_START_OP); } +static int nxp_c45_config_intr(struct phy_device *phydev) +{ + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) + return phy_set_bits_mmd(phydev, MDIO_MMD_VEND1, + VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); + else + return phy_clear_bits_mmd(phydev, MDIO_MMD_VEND1, + VEND1_PHY_IRQ_EN, PHY_IRQ_LINK_EVENT); +} + +static irqreturn_t nxp_c45_handle_interrupt(struct phy_device *phydev) +{ + irqreturn_t ret = IRQ_NONE; + int irq; + + irq = phy_read_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_STATUS); + if (irq & PHY_IRQ_LINK_EVENT) { + phy_trigger_machine(phydev); + phy_write_mmd(phydev, MDIO_MMD_VEND1, VEND1_PHY_IRQ_ACK, + PHY_IRQ_LINK_EVENT); + ret = IRQ_HANDLED; + } + + return ret; +} + static int nxp_c45_soft_reset(struct phy_device *phydev) { int ret; @@ -560,6 +591,8 @@ static struct phy_driver nxp_c45_driver[] = { .soft_reset = nxp_c45_soft_reset, .config_aneg = nxp_c45_config_aneg, .config_init = nxp_c45_config_init, + .config_intr = nxp_c45_config_intr, + .handle_interrupt = nxp_c45_handle_interrupt, .read_status = nxp_c45_read_status, .suspend = genphy_c45_pma_suspend, .resume = genphy_c45_pma_resume, base-commit: cad4162a90aeff737a16c0286987f51e927f003a -- 2.31.1