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Date:   Fri, 23 Apr 2021 18:46:51 +0200
From:   Thierry Reding <thierry.reding@gmail.com>
To:     Clemens Gruber <clemens.gruber@pqgruber.com>
Cc:     linux-pwm@vger.kernel.org,
        Uwe =?utf-8?Q?Kleine-K=C3=B6nig?= 
        <u.kleine-koenig@pengutronix.de>,
        Sven Van Asbroeck <TheSven73@gmail.com>,
        devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v9 1/8] pwm: pca9685: Switch to atomic API
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References: <20210415121455.39536-1-clemens.gruber@pqgruber.com>
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On Thu, Apr 22, 2021 at 01:39:01PM +0200, Clemens Gruber wrote:
> On Sat, Apr 17, 2021 at 09:51:50PM +0200, Uwe Kleine-K=C3=B6nig wrote:
> > On Thu, Apr 15, 2021 at 02:14:48PM +0200, Clemens Gruber wrote:
> > > The switch to the atomic API goes hand in hand with a few fixes to
> > > previously experienced issues:
> > > - The duty cycle is no longer lost after disable/enable (previously t=
he
> > >   OFF registers were cleared in disable and the user was required to
> > >   call config to restore the duty cycle settings)
> > > - If one sets a period resulting in the same prescale register value,
> > >   the sleep and write to the register is now skipped
> > > - Previously, only the full ON bit was toggled in GPIO mode (and full
> > >   OFF cleared if set to high), which could result in both full OFF and
> > >   full ON not being set and on=3D0, off=3D0, which is not allowed acc=
ording
> > >   to the datasheet
> > > - The OFF registers were reset to 0 in probe, which could lead to the
> > >   forbidden on=3D0, off=3D0. Fixed by resetting to POR default (full =
OFF)
> > >=20
> > > Signed-off-by: Clemens Gruber <clemens.gruber@pqgruber.com>
> >=20
> > (I sent my ack to v8 before, but indeed this was the version I intended
> > to ack)
> >=20
> > Acked-by: Uwe Kleine-K=C3=B6nig <u.kleine-koenig@pengutronix.de>
>=20
> Thierry: Do you think we can get patches 1 to 3 into 5.13-rc1?

Applied patches 1-3, thanks.

Thierry

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