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From:   Thomas Gleixner <tglx@linutronix.de>
To:     Feng Tang <feng.tang@intel.com>,
        Xing Zhengjun <zhengjun.xing@linux.intel.com>,
        paulmck@kernel.org
Cc:     paulmck@kernel.org, John Stultz <john.stultz@linaro.org>,
        Stephen Boyd <sboyd@kernel.org>,
        Jonathan Corbet <corbet@lwn.net>,
        Mark Rutland <Mark.Rutland@arm.com>,
        Marc Zyngier <maz@kernel.org>, Andi Kleen <ak@linux.intel.com>,
        Chris Mason <clm@fb.com>, LKML <linux-kernel@vger.kernel.org>,
        lkp@lists.01.org, lkp@intel.com
Subject: Re: [LKP] Re: [clocksource] 6c52b5f3cf: stress-ng.opcode.ops_per_sec -14.4% regression
In-Reply-To: <20210422074126.GA85095@shbuild999.sh.intel.com>
References: <20210420064934.GE31773@xsang-OptiPlex-9020> <20210420134331.GM975577@paulmck-ThinkPad-P17-Gen-1> <20210420140552.GA3158164@paulmck-ThinkPad-P17-Gen-1> <04f4752e-6c5a-8439-fe75-6363d212c7b2@intel.com> <20210421134224.GR975577@paulmck-ThinkPad-P17-Gen-1> <ed77d2a5-aeb0-b7f5-ce91-4cac12cfdd61@linux.intel.com> <20210422074126.GA85095@shbuild999.sh.intel.com>
Date:   Fri, 23 Apr 2021 21:09:58 +0200
Message-ID: <87wnssvmux.ffs@nanos.tec.linutronix.de>
MIME-Version: 1.0
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On Thu, Apr 22 2021 at 15:41, Feng Tang wrote:
> On Thu, Apr 22, 2021 at 02:58:27PM +0800, Xing Zhengjun wrote:
>> It happened during boot and before TSC calibration
>> (tsc_refine_calibration_work()), so on some machines "abs(cs_nsec - wd_nsec)
>> > WATCHDOG_THRESHOLD", WATCHDOG_THRESHOLD is set too small at that time.
>> After TSC calibrated, abs(cs_nsec - wd_nsec) should be very small,
>> WATCHDOG_THRESHOLD for here is ok. So I suggest increasing the
>> WATCHDOG_THRESHOLD before TSC calibration, for example, the clocks be skewed
>> by more than 1% to be marked unstable.
>
> As Zhengjun measuered, this is a Cascade Lake platform, and it has 2
> times calibration of tsc, the first one of early quick calibration gives
> 2100 MHz, while the later accurate calibration gives 2095 MHz, so there
> is about 2.5/1000 deviation for the first number, which just exceeds the
> 1/1000 threshold you set :)
>
> Following is the tsc freq info from kernel log
>
> [    0.000000] DMI: Intel Corporation S2600WFT/S2600WFT, BIOS SE5C620.86B.02.01.0008.031920191559 03/19/2019
> [    0.000000] tsc: Detected 2100.000 MHz processor
> ...
> [   13.859982] tsc: Refined TSC clocksource calibration: 2095.077 MHz

Right, that's because in 2021 we still use technology from the last
millenium to figure the correct TSC frequency out by doing a long time
measurement against some other timer where we assume to know the
frequeny it runs with.

Thanks,

        tglx