Received: by 2002:a05:6a10:a841:0:0:0:0 with SMTP id d1csp3664032pxy; Mon, 26 Apr 2021 07:04:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxAl2a7BHZT5DeRDOg4wSNB6G0grXjCbA8cYquCBN1wm1Ss7BN9ORzbUq15HbUyvhYJyGDA X-Received: by 2002:a17:906:fb92:: with SMTP id lr18mr18505852ejb.511.1619445842874; Mon, 26 Apr 2021 07:04:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619445842; cv=none; d=google.com; s=arc-20160816; b=BEVsYs+LEH0PMy4SY4E6lqw1PFCJ/9RGV39d9lHVPHoMi/G9uYTiZEOIetonPBDf23 8w0gbc/ioDhNnP30ItXVZfM1KTrLgJxEOcMxxpz5uJBQDi59N/Yv1Xxmra4H4lkQO+6L zjC6UXffqYZ0ceB7Inxu8GYN7g80FWerCO98Lb9Am9W3NSfF48mfxE1Y0ZWrFuODMnHW X/Jfcac12ml5OLp8/ggNjvl2zoczvb326iFLsi66DW9bq/xXU0qvyF9doL6ewdBBXNV5 dnOXtl5siy6UIL0yVuom4/S/jEqu08TU+ZocpWvRxeUhpb1UPUFn6DD4t1EPL8uwkOpW qgIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:references :organization:in-reply-to:subject:cc:to:from:ironport-sdr :ironport-sdr; bh=KAt/XPqTU6HwPV8aF4U64q61VE7cvqAZnsULUtqXH2w=; b=FkCdiGdPTqovNlL2wRjvuLuep9aLq4LF1uIza+0zF0jZHGX6rh5zs87vgDIO8GBR9t uLIIyjinh5a418iSg5x7DwT99eN+YU7MeKAPlG2DkCP7coLfNJDYWZMZFo7COzD5l2i4 EpPtF/DBOye+50x2JpRba3xLt3/4thXp3kswAVpHa/GKPdiKD226engSpl5Cv0XJOtFM /PhY4NkZGIdjlEciWHmTfM5JPKKeijbSK8C6RUOuI6pZzqLNVJKylEtJl59b/zCaTDLs 2k/+wgKlKdTCx56LjVq2mvvQDObIDnCV77SnvhsSrKOvLDrqeYdcTQCzv+h0n8ONCkSl 2BsQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id p9si13207848ejx.574.2021.04.26.07.03.38; Mon, 26 Apr 2021 07:04:02 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233757AbhDZODI (ORCPT + 99 others); Mon, 26 Apr 2021 10:03:08 -0400 Received: from mga12.intel.com ([192.55.52.136]:60366 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233753AbhDZODF (ORCPT ); Mon, 26 Apr 2021 10:03:05 -0400 IronPort-SDR: 6GBifomqsSvYWlBcCm54qTbZunpuKQv9MWgWAbVJrB6+z4E2BvEMRwuKch5Bpi6HxEKbZ1h7nx l9E805uGWZAA== X-IronPort-AV: E=McAfee;i="6200,9189,9966"; a="175821456" X-IronPort-AV: E=Sophos;i="5.82,252,1613462400"; d="scan'208";a="175821456" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2021 07:02:24 -0700 IronPort-SDR: s7oyIgZqBjdjZo0+7BlmBmM9LWUjSS+7z47GV0wkE5zh63dppdouTE+mfg0im3BNK2KxNOpuVa dCGxZnqOoBjQ== X-IronPort-AV: E=Sophos;i="5.82,252,1613462400"; d="scan'208";a="429407654" Received: from unknown (HELO localhost) ([10.252.50.197]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2021 07:02:21 -0700 From: Jani Nikula To: zuoqilin1@163.com, airlied@linux.ie, daniel@ffwll.ch Cc: zuoqilin , intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org Subject: Re: [PATCH] display: Fix typo issue In-Reply-To: <20210317074228.1147-1-zuoqilin1@163.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo References: <20210317074228.1147-1-zuoqilin1@163.com> Date: Mon, 26 Apr 2021 17:02:17 +0300 Message-ID: <87fszd5el2.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 17 Mar 2021, zuoqilin1@163.com wrote: > From: zuoqilin > > Change 'befor' to 'before'. > > Signed-off-by: zuoqilin Thanks, pushed, sorry for the delay. BR, Jani. > --- > drivers/gpu/drm/i915/display/vlv_dsi.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c > index f94025e..45187ff 100644 > --- a/drivers/gpu/drm/i915/display/vlv_dsi.c > +++ b/drivers/gpu/drm/i915/display/vlv_dsi.c > @@ -846,7 +846,7 @@ static void intel_dsi_pre_enable(struct intel_atomic_state *state, > intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_INIT_OTP); > > /* Enable port in pre-enable phase itself because as per hw team > - * recommendation, port should be enabled befor plane & pipe */ > + * recommendation, port should be enabled before plane & pipe */ > if (is_cmd_mode(intel_dsi)) { > for_each_dsi_port(port, intel_dsi->ports) > intel_de_write(dev_priv, -- Jani Nikula, Intel Open Source Graphics Center