Received: by 2002:a05:6a10:a841:0:0:0:0 with SMTP id d1csp4832010pxy; Tue, 27 Apr 2021 13:46:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxLIr3ngDuwHl16SsXFbP4jTKvG9qrG9qN99tNHHwCvRfBwLgpLuc+5hyyjKP9LDDh0uBik X-Received: by 2002:a17:90a:8906:: with SMTP id u6mr29350311pjn.162.1619556416601; Tue, 27 Apr 2021 13:46:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1619556416; cv=none; d=google.com; s=arc-20160816; b=wlnIuDFTOSYcbjDAWiDQC6HXiXZVKttt72RqCFQUrJ/ZKCJPPiFkN5Pmj7LMQc9lPM 4y86nxLS37fyjLqMzuCUlk2AapQ3jdEad6WtSU75xkGyVGhMJkT3w/aHPCOv8BBY1KUg BC3g44dVfmR8LrXnieVsHCLgVbvwDIoZ2xWKRWum58k8MxfUAxYaQCHaJHuSYuicxFGp Rq67AWfdbYuRm/SKJGg1QbaBEa6yCbSo+7r8Bk8YGp0ifHeNTe6VgzRJEKm+RHGCQ2Dv UYLx9GhAI54nupUN1EubRnGwGbqV+Gk4l5CxuF52JNYdlewQ4w5eQKBgdFYl5TjcjN67 npEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :ironport-sdr:ironport-sdr; bh=7ycPwWR86MmTI4p94RWYCf93+70tsJh8whgmm9tbeJ4=; b=vPjIVFpU8GZXExupI5OYjVhefPQA/hsoYRIbP5bvSTSoeGxKTNw18Vm3PhOi5mRti+ e417qfBC3zcK1jpa5pDSgXBtPPsM/h5/WhC+QLI4CEAdR6Q38y2eDxLVHJjk6fxEpzbz /DbCMYIc9TZ7IB90e8FAGkUMmWpjTFrhtEsbnO9U518fMArJd/uYaJJJQ/rrmcr/JZNh u2Jl4QCwjZF8rmT0kVcCNQsA8mo3AFR+buKUz6AigcHd3mG2x9xjrjtvZWTEfdoeaRhX fDtIcfxpEzBm7XJ3HlzBRvXXGXa+ni0Zp5w/WPoNAWHI2VGzQ8yC0uK4fGujFMoe+Puu FHxw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id l8si918675pgq.503.2021.04.27.13.46.44; Tue, 27 Apr 2021 13:46:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239168AbhD0Ups (ORCPT + 99 others); Tue, 27 Apr 2021 16:45:48 -0400 Received: from mga05.intel.com ([192.55.52.43]:31782 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239120AbhD0UpV (ORCPT ); Tue, 27 Apr 2021 16:45:21 -0400 IronPort-SDR: misYaUT8Vj6xlFbfZRSKk7AX/KqVy/RwvdQ7/psVOoVFJyoQuiBaayIZdck8sEED4tNR0zZEPG +x0U3+6EbAZg== X-IronPort-AV: E=McAfee;i="6200,9189,9967"; a="281922476" X-IronPort-AV: E=Sophos;i="5.82,255,1613462400"; d="scan'208";a="281922476" Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2021 13:44:15 -0700 IronPort-SDR: JTsITtzNjQfEiRw5TlsGstnNUL1WZhpobfNtlVwhnCZSpOy29dMh8GWRFxMseh4aRrZg8ajO2r 8DDrnmvmpNZA== X-IronPort-AV: E=Sophos;i="5.82,255,1613462400"; d="scan'208";a="465623511" Received: from yyu32-desk.sc.intel.com ([143.183.136.146]) by orsmga001-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Apr 2021 13:44:14 -0700 From: Yu-cheng Yu To: x86@kernel.org, "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mm@kvack.org, linux-arch@vger.kernel.org, linux-api@vger.kernel.org, Arnd Bergmann , Andy Lutomirski , Balbir Singh , Borislav Petkov , Cyrill Gorcunov , Dave Hansen , Eugene Syromiatnikov , Florian Weimer , "H.J. Lu" , Jann Horn , Jonathan Corbet , Kees Cook , Mike Kravetz , Nadav Amit , Oleg Nesterov , Pavel Machek , Peter Zijlstra , Randy Dunlap , "Ravi V. Shankar" , Vedvyas Shanbhogue , Dave Martin , Weijiang Yang , Pengfei Xu , Haitao Huang Cc: Yu-cheng Yu , "Kirill A . Shutemov" Subject: [PATCH v26 14/30] x86/mm: Shadow Stack page fault error checking Date: Tue, 27 Apr 2021 13:42:59 -0700 Message-Id: <20210427204315.24153-15-yu-cheng.yu@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20210427204315.24153-1-yu-cheng.yu@intel.com> References: <20210427204315.24153-1-yu-cheng.yu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Shadow stack accesses are those that are performed by the CPU where it expects to encounter a shadow stack mapping. These accesses are performed implicitly by CALL/RET at the site of the shadow stack pointer. These accesses are made explicitly by shadow stack management instructions like WRUSSQ. Shadow stacks accesses to shadow-stack mapping can see faults in normal, valid operation just like regular accesses to regular mappings. Shadow stacks need some of the same features like delayed allocation, swap and copy-on-write. Shadow stack accesses can also result in errors, such as when a shadow stack overflows, or if a shadow stack access occurs to a non-shadow-stack mapping. In handling a shadow stack page fault, verify it occurs within a shadow stack mapping. It is always an error otherwise. For valid shadow stack accesses, set FAULT_FLAG_WRITE to effect copy-on-write. Because clearing _PAGE_DIRTY (vs. _PAGE_RW) is used to trigger the fault, shadow stack read fault and shadow stack write fault are not differentiated and both are handled as a write access. Signed-off-by: Yu-cheng Yu Reviewed-by: Kees Cook Reviewed-by: Kirill A. Shutemov --- v24: - Change VM_SHSTK to VM_SHADOW_STACK. arch/x86/include/asm/trap_pf.h | 2 ++ arch/x86/mm/fault.c | 19 +++++++++++++++++++ 2 files changed, 21 insertions(+) diff --git a/arch/x86/include/asm/trap_pf.h b/arch/x86/include/asm/trap_pf.h index 10b1de500ab1..afa524325e55 100644 --- a/arch/x86/include/asm/trap_pf.h +++ b/arch/x86/include/asm/trap_pf.h @@ -11,6 +11,7 @@ * bit 3 == 1: use of reserved bit detected * bit 4 == 1: fault was an instruction fetch * bit 5 == 1: protection keys block access + * bit 6 == 1: shadow stack access fault * bit 15 == 1: SGX MMU page-fault */ enum x86_pf_error_code { @@ -20,6 +21,7 @@ enum x86_pf_error_code { X86_PF_RSVD = 1 << 3, X86_PF_INSTR = 1 << 4, X86_PF_PK = 1 << 5, + X86_PF_SHSTK = 1 << 6, X86_PF_SGX = 1 << 15, }; diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index a73347e2cdfc..394e504305b7 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -1100,6 +1100,17 @@ access_error(unsigned long error_code, struct vm_area_struct *vma) (error_code & X86_PF_INSTR), foreign)) return 1; + /* + * Verify a shadow stack access is within a shadow stack VMA. + * It is always an error otherwise. Normal data access to a + * shadow stack area is checked in the case followed. + */ + if (error_code & X86_PF_SHSTK) { + if (!(vma->vm_flags & VM_SHADOW_STACK)) + return 1; + return 0; + } + if (error_code & X86_PF_WRITE) { /* write, present and write, not present: */ if (unlikely(!(vma->vm_flags & VM_WRITE))) @@ -1293,6 +1304,14 @@ void do_user_addr_fault(struct pt_regs *regs, perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address); + /* + * Clearing _PAGE_DIRTY is used to detect shadow stack access. + * This method cannot distinguish shadow stack read vs. write. + * For valid shadow stack accesses, set FAULT_FLAG_WRITE to effect + * copy-on-write. + */ + if (error_code & X86_PF_SHSTK) + flags |= FAULT_FLAG_WRITE; if (error_code & X86_PF_WRITE) flags |= FAULT_FLAG_WRITE; if (error_code & X86_PF_INSTR) -- 2.21.0