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[99.44.17.11]) by smtp.gmail.com with ESMTPSA id q21sm23807pfl.152.2021.04.29.16.40.48 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 29 Apr 2021 16:40:53 -0700 (PDT) Subject: Re: [PATCH net-next 1/4] net: phy: add MediaTek PHY driver To: DENG Qingfang , "David S. Miller" , Andrew Lunn , Heiner Kallweit , Jakub Kicinski , Landen Chao , Matthias Brugger , Russell King , Sean Wang , Vivien Didelot , Vladimir Oltean , Rob Herring , Linus Walleij , Greg Kroah-Hartman , Sergio Paracuellos , linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linux-staging@lists.linux.dev, devicetree@vger.kernel.org, netdev@vger.kernel.org Cc: Weijie Gao , Chuanhong Guo , =?UTF-8?Q?Ren=c3=a9_van_Dorst?= , Frank Wunderlich , Thomas Gleixner , Marc Zyngier References: <20210429062130.29403-1-dqfext@gmail.com> <20210429062130.29403-2-dqfext@gmail.com> From: Florian Fainelli Message-ID: <7330e4f6-5e7a-1993-1577-fefaa163b6cd@gmail.com> Date: Thu, 29 Apr 2021 16:40:39 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:78.0) Gecko/20100101 Firefox/78.0 Thunderbird/78.10.0 MIME-Version: 1.0 In-Reply-To: <20210429062130.29403-2-dqfext@gmail.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 4/28/2021 11:21 PM, DENG Qingfang wrote: > Add support for MediaTek PHYs found in MT7530 and MT7531 switches. > The initialization procedure is from the vendor driver, but due to lack > of documentation, the function of some register values remains unknown. > > Signed-off-by: DENG Qingfang Reviewed-by: Florian Fainelli -- Florian