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 <20210503014336.20256-3-steven_lee@aspeedtech.com>
Date:   Mon, 03 May 2021 14:37:47 +0930
From:   "Andrew Jeffery" <andrew@aj.id.au>
To:     "Steven Lee" <steven_lee@aspeedtech.com>,
        "Rob Herring" <robh+dt@kernel.org>,
        "Joel Stanley" <joel@jms.id.au>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-arm-kernel@lists.infradead.org>,
        "moderated list:ARM/ASPEED MACHINE SUPPORT" 
        <linux-aspeed@lists.ozlabs.org>,
        "open list" <linux-kernel@vger.kernel.org>
Cc:     "Hongwei Zhang" <Hongweiz@ami.com>,
        "Ryan Chen" <ryan_chen@aspeedtech.com>,
        "Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>
Subject: =?UTF-8?Q?Re:_[PATCH_v2_2/3]_ARM:_dts:_aspeed:_ast2600evb:_Add_timing-ph?=
 =?UTF-8?Q?ase_property_for_eMMC_controller?=
Content-Type: text/plain
Precedence: bulk

Hi Steven,

On Mon, 3 May 2021, at 11:13, Steven Lee wrote:
> Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs.
> 
> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com>
> ---
>  arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts 
> b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
> index 2772796e215e..7a93317e27dc 100644
> --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts
> +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts
> @@ -102,6 +102,7 @@
>  
>  &emmc_controller {
>  	status = "okay";
> +	timing-phase = <0x300FF>;

Please use the existing binding for phase corrections. The existing 
binding is already supported by the driver (added in v5.12).

Andrew