Received: by 2002:a05:6a10:a852:0:0:0:0 with SMTP id d18csp2626173pxy; Mon, 3 May 2021 04:38:08 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxTM+MUNRWWT+SoW3Pl9hOBtNXqkEcoHVc/V4IxBTspbyQYVhT8TrReYrb7iuH4Mc1vAU6g X-Received: by 2002:a05:6402:2283:: with SMTP id cw3mr19316059edb.122.1620041888175; Mon, 03 May 2021 04:38:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620041888; cv=none; d=google.com; s=arc-20160816; b=MJpvjYts0VClYlLZv9RdXc0cslsRaIkycZBcqmAh0ec1KYo8iC5ygHgzxZGWfnUR3a QKPlBlRQWfizDsYMp+N8xCO95fA4Dif3+HcZhJcFHAp0QlU4AtEWAsypR8EitbyStih7 0Zxbs/Id0JxVGW8Ukn09iXiT3xwn1HWmh4viVnFkLauh97dOhWzXKcBPD2PQtHwbTvWw MkmOJJq7Dn3Lt0+S2U/sbIwxWsCAv2TLAWBsR6P2z8mURYIilnERDrC38k2Y7FD7BXZC 08OmbxqWZFptWj9cIHV7NB/XS4VkaJlQpwxIxAPwY3sn8RQmOQDjZ3LvMoXTy7qgRzID 5rjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:user-agent:in-reply-to:content-disposition :mime-version:references:message-id:subject:cc:to:from:date; bh=Ae8nN6cfKj66ld0QlfLXdLnkxRTHERzylRKd1Ojmbuk=; b=VAXovGlwSOADagbr1lpkmoSJjB3uGe6FoYMVjfzcHxw/BJJJaIeLl5ZXuf6FgC1jX8 pFcvTV7Qt/utN8ewXYMjCLh+v6T3jgwbQ5/n1PdP+t8Eh/GpgRAppgPbFElKqTwaUnPg oOCxFrm/VAZnFkchW8cdXRbOtzciPB1BsYw/TLvhuMTMQJwFuLiCozJ0wlm1foAE3i5+ O5g4vNy8dFGMTgRiA27hLAU13wVx2LY09aABNCthkkYx7qVMLbNyt0eSJR8TkXjSJfZ3 i3t/5zGXWI8+D02S6Dk58XbpBgkC4XtTEov4C+Z/O/VOY6FD7UsDUku+/eA4Qdt2Utk7 3kLw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a9si204171edr.307.2021.05.03.04.37.44; Mon, 03 May 2021 04:38:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233489AbhECK7W (ORCPT + 99 others); Mon, 3 May 2021 06:59:22 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:51020 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233477AbhECK7W (ORCPT ); Mon, 3 May 2021 06:59:22 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 143Akm0o036864; Mon, 3 May 2021 18:46:48 +0800 (GMT-8) (envelope-from steven_lee@aspeedtech.com) Received: from aspeedtech.com (192.168.100.253) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 3 May 2021 18:58:27 +0800 Date: Mon, 3 May 2021 18:58:19 +0800 From: Steven Lee To: Andrew Jeffery CC: Rob Herring , Joel Stanley , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , "moderated list:ARM/ASPEED MACHINE SUPPORT" , open list , Hongwei Zhang , Ryan Chen , Chin-Ting Kuo Subject: Re: [PATCH v2 2/3] ARM: dts: aspeed: ast2600evb: Add timing-phase property for eMMC controller Message-ID: <20210503105819.GC12520@aspeedtech.com> References: <20210503014336.20256-1-steven_lee@aspeedtech.com> <20210503014336.20256-3-steven_lee@aspeedtech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) X-Originating-IP: [192.168.100.253] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 143Akm0o036864 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The 05/03/2021 13:07, Andrew Jeffery wrote: > Hi Steven, > > On Mon, 3 May 2021, at 11:13, Steven Lee wrote: > > Set eMMC input clock phase to 3, which is more stable on AST2600 EVBs. > > > > Signed-off-by: Steven Lee > > --- > > arch/arm/boot/dts/aspeed-ast2600-evb.dts | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > index 2772796e215e..7a93317e27dc 100644 > > --- a/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > +++ b/arch/arm/boot/dts/aspeed-ast2600-evb.dts > > @@ -102,6 +102,7 @@ > > > > &emmc_controller { > > status = "okay"; > > + timing-phase = <0x300FF>; > > Please use the existing binding for phase corrections. The existing > binding is already supported by the driver (added in v5.12). > Hi Andrew, Thanks for the review. I will add the following settings from aspeed-bmc-ibm-rainier.dts instead of adding timing-phase in device tree. clk-phase-mmc-hs200 = ; > Andrew