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Tue, 4 May 2021 00:01:32 +0000 Received: from [10.2.50.162] (172.20.145.6) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Tue, 4 May 2021 00:01:30 +0000 Subject: Re: [PATCH 09/16] dma-direct: Support PCI P2PDMA pages in dma-direct map_sg To: Logan Gunthorpe , , , , , , CC: Stephen Bates , Christoph Hellwig , Dan Williams , Jason Gunthorpe , =?UTF-8?Q?Christian_K=c3=b6nig?= , Don Dutile , Matthew Wilcox , Daniel Vetter , Jakowski Andrzej , Minturn Dave B , Jason Ekstrand , Dave Hansen , Xiong Jianxin , Bjorn Helgaas , Ira Weiny , Robin Murphy References: <20210408170123.8788-1-logang@deltatee.com> <20210408170123.8788-10-logang@deltatee.com> <37fa46c7-2c24-1808-16e9-e543f4601279@nvidia.com> <8de928ab-2842-dac9-07ad-a098124f791f@deltatee.com> From: John Hubbard Message-ID: <2a08b685-53c1-3ee4-0ce1-315554d63685@nvidia.com> Date: Mon, 3 May 2021 17:01:29 -0700 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.10.0 MIME-Version: 1.0 In-Reply-To: <8de928ab-2842-dac9-07ad-a098124f791f@deltatee.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [172.20.145.6] X-ClientProxiedBy: HQMAIL111.nvidia.com (172.20.187.18) To HQMAIL107.nvidia.com (172.20.187.13) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 0813dd7d-b8d3-4a4a-ab1e-08d90e8fc688 X-MS-TrafficTypeDiagnostic: DM6PR12MB4419: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:5516; X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: g25pE3vm47iOOf3nrkoBw1Avm6lF0MjJlFEB7U2Yew/Zyk7wqbrBCatnGMxxEQGK1DuKwK2om1mRsSuX381Gq647R9kcThPTGXC9Eb473Y1SDtTHjjWQ9ZjWu3NGWifydb/zEnPmY45pZGuqfAQI3iuHV0+rbYKgtfRd62jdfLGf/wzqu34Wdr1v7gwKPZkbTEdTglHIZSwJRcWzh9PiTImue55182LoRc3RNolAUxSERvTc7VVTMQJocrNm7iTH+XdpTDIQNItwZUtNjUeFd1TRLbwtgADjfUNhvEtgscaLV3i6i66VKg1o+bWQlw8S/iPxhS0/LrFRaQ4ywxwgC2jZtqmB4AxClxDTQRdHYuKfnLQ2z1EBi2gB0ToZr9zq0Fsj89sk63tUBSRjCR/ukWwQmeH1hScFOEXxNhC0Fe6LBMfas8VgzcC8HjujsyZsYMvtWwmAr/DYIwWjbCGMFUa/0Q+T94rs1hMgwufvv20vVZ279CqFeYdd13X0Fu+H+OMhdTbywmbh0n9fd2xml0BgFnywafIM0wLvfzcBJmIOcr3/JZo5mc+/BcVVHNq8Wfdr6gbPjHZgrkvJPmcLxYtPcp0F47mo8iR0uliYkKKR5nZ5OuGHpSHNg33a/Q7h+6GkP0rzklkRCQ4APUNhMnAJ+thEVMTWRj3813r+vPlX4fX2VMcgQK/hFIJXVctYVGe3Z0A/xFQuPkS6vjrtdA== X-Forefront-Antispam-Report: CIP:216.228.112.34;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:schybrid03.nvidia.com;CAT:NONE;SFS:(4636009)(376002)(136003)(39860400002)(346002)(396003)(46966006)(36840700001)(110136005)(316002)(2906002)(336012)(36860700001)(426003)(7416002)(8676002)(83380400001)(47076005)(31696002)(86362001)(4326008)(26005)(7636003)(82310400003)(5660300002)(8936002)(478600001)(31686004)(16576012)(70586007)(36756003)(70206006)(186003)(16526019)(356005)(36906005)(2616005)(82740400003)(54906003)(53546011)(43740500002)(2101003);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2021 00:01:32.1844 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0813dd7d-b8d3-4a4a-ab1e-08d90e8fc688 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT068.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4419 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 5/3/21 10:04 AM, Logan Gunthorpe wrote: > Oops missed a comment: > > On 2021-05-02 5:28 p.m., John Hubbard wrote: >>> int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, int nents, >>> enum dma_data_direction dir, unsigned long attrs) >>> { >>> - int i; >>> + struct pci_p2pdma_map_state p2pdma_state = {}; >> >> Is it worth putting this stuff on the stack--is there a noticeable >> performance improvement from caching the state? Because if it's >> invisible, then simplicity is better. I suspect you're right, and that >> it *is* worth it, but it's good to know for real. > > I haven't measured it (it would be hard to measure), but I think it's > fairly clear here. Without the state, xa_load() would need to be called > on *every* page in an SGL that maps only P2PDMA memory from one device. > With the state, it only needs to be called once. xa_load() is cheap, but > it is not that cheap. OK, thanks for spelling it out for me. :) > > There's essentially the same optimization in get_user_pages for > ZONE_DEVICE pages. So, if it is necessary there, it should be necessary > here. > Right, that's a pretty solid example. thanks, -- John Hubbard NVIDIA