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not signed) header.d=none;nxp.com; dmarc=none action=none header.from=kontron.de; Received: from AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:157::14) by AM8PR10MB4625.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:20b:356::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4087.38; Tue, 4 May 2021 10:25:23 +0000 Received: from AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM ([fe80::3d8a:f56b:3a0c:8a87]) by AM0PR10MB2963.EURPRD10.PROD.OUTLOOK.COM ([fe80::3d8a:f56b:3a0c:8a87%7]) with mapi id 15.20.4087.044; Tue, 4 May 2021 10:25:23 +0000 Subject: Re: [PATCH V2 4/4] soc: imx: Add blk-ctl driver for i.MX8MM To: "Peng Fan (OSS)" , robh+dt@kernel.org, shawnguo@kernel.org, s.hauer@pengutronix.de Cc: kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, p.zabel@pengutronix.de, l.stach@pengutronix.de, krzk@kernel.org, agx@sigxcpu.org, marex@denx.de, andrew.smirnov@gmail.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, 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10:25:23.4585 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 8c9d3c97-3fd9-41c8-a2b1-646f3942daf1 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: K4Q3jgczwoK4TJb+c12HYfl6E5fM97xO3FvKqfeS/UBvSsxQDWQsbb4pkhwSaAb8bDUgw2+ZWVtlGji9oFCEx4D/k7mCLn52siLop46rwLI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR10MB4625 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 30.04.21 07:27, Peng Fan (OSS) wrote: > From: Peng Fan > > The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add > that support in this driver. > > Signed-off-by: Peng Fan > --- > drivers/soc/imx/Makefile | 2 +- > drivers/soc/imx/blk-ctl-imx8mm.c | 138 +++++++++++++++++++++++++++++++ > 2 files changed, 139 insertions(+), 1 deletion(-) > create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c > > diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile > index d3d2b49a386c..c260b962f495 100644 > --- a/drivers/soc/imx/Makefile > +++ b/drivers/soc/imx/Makefile > @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) += soc-imx.o > endif > obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o > obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o > -obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o > +obj-$(CONFIG_SOC_IMX8M) += soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o > diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c b/drivers/soc/imx/blk-ctl-imx8mm.c > new file mode 100644 > index 000000000000..77e0a5d3fdac > --- /dev/null > +++ b/drivers/soc/imx/blk-ctl-imx8mm.c > @@ -0,0 +1,138 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright 2021 NXP > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include "blk-ctl.h" > + > +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN BIT(6) > +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN BIT(5) > +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN BIT(4) > +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN BIT(3) > +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN GENMASK(2, 0) > + > +#define MEDIA_BLK_BUS_PD_MASK BIT(12) > +#define MEDIA_BLK_MIPI_CSI_PD_MASK GENMASK(11, 10) > +#define MEDIA_BLK_MIPI_DSI_PD_MASK GENMASK(9, 8) > +#define MEDIA_BLK_LCDIF_PD_MASK GENMASK(7, 6) > +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK GENMASK(5, 0) > + > +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] = { > + IMX_BLK_CTL_PD("CSI_BRIDGE", "dispmix", IMX8MM_BLK_CTL_DISPMIX_CSI_BRIDGE, 0x4, > + MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0, MEDIA_BLK_CSI_BRIDGE_SFT_EN, > + IMX_BLK_CTL_PD_RESET), > + IMX_BLK_CTL_PD("LCDIF", "dispmix", IMX8MM_BLK_CTL_DISPMIX_LCDIF, 0x4, > + MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0), > + IMX_BLK_CTL_PD("MIPI_DSI", "mipi", IMX8MM_BLK_CTL_DISPMIX_MIPI_DSI, 0x4, > + MEDIA_BLK_MIPI_DSI_PD_MASK, 0, MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN, > + IMX_BLK_CTL_PD_RESET), > + IMX_BLK_CTL_PD("MIPI_CSI", "mipi", IMX8MM_BLK_CTL_DISPMIX_MIPI_CSI, 0x4, > + MEDIA_BLK_MIPI_CSI_PD_MASK, 0, > + MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN | MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN, > + IMX_BLK_CTL_PD_RESET) > +}; > + > +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] = { > + IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2", IMX8MM_BLK_CTL_G2_PD, 0x4, > + BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET), > + IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1", IMX8MM_BLK_CTL_G1_PD, 0x4, > + BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET), > + IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1", IMX8MM_BLK_CTL_H1_PD, 0x4, > + BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET), > +}; > + > +static const struct regmap_config imx8mm_blk_ctl_regmap_config = { > + .reg_bits = 32, > + .reg_stride = 4, > + .val_bits = 32, > + .max_register = 0x30, > + .fast_io = true, > +}; > + > +static const struct imx_blk_ctl_dev_data imx8mm_vpumix_blk_ctl_dev_data = { > + .pds = imx8mm_vpumix_blk_ctl_pds, > + .pds_num = ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds), > + .hw_hsk = IMX_BLK_CTL_PD(NULL, NULL, IMX8MM_BLK_CTL_H1_PD, 0x4, BIT(2), 0, BIT(2), > + IMX_BLK_CTL_PD_HANDSHAKE), > + .config = imx8mm_blk_ctl_regmap_config, > + .active_pd_names = (char*[]){"vpumix", "g1", "g2", "h1"}, > + .num_active_pd = 4, > +}; > + > +static const struct imx_blk_ctl_dev_data imx8mm_dispmix_blk_ctl_dev_data = { > + .pds = imx8mm_dispmix_blk_ctl_pds, > + .pds_num = ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds), > + .hw_hsk = IMX_BLK_CTL_PD(NULL, NULL, -1, 0x4, MEDIA_BLK_BUS_PD_MASK, 0, > + MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN, > + IMX_BLK_CTL_PD_HANDSHAKE | IMX_BLK_CTL_PD_RESET), > + .config = imx8mm_blk_ctl_regmap_config, > + .active_pd_names = (char*[]){"dispmix", "mipi"}, > + .num_active_pd = 2, > +}; > + > +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) > +{ > + struct device *dev = &pdev->dev; > + const struct imx_blk_ctl_dev_data *dev_data = of_device_get_match_data(dev); > + struct regmap *regmap; > + struct resource *res; > + struct imx_blk_ctl *ctl; > + void __iomem *base; > + > + ctl = devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL); > + if (!ctl) > + return -ENOMEM; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + base = devm_ioremap_resource(dev, res); This could be simplified by using devm_platform_ioremap_resource(). > + if (IS_ERR(base)) > + return PTR_ERR(base); > + > + regmap = devm_regmap_init_mmio(dev, base, &dev_data->config); > + if (IS_ERR(regmap)) > + return PTR_ERR(regmap); > + > + ctl->regmap = regmap; > + ctl->dev = dev; > + atomic_set(&ctl->power_count, 0); > + > + ctl->num_clks = devm_clk_bulk_get_all(dev, &ctl->clks); > + if (ctl->num_clks < 0) > + return ctl->num_clks; > + > + dev_set_drvdata(dev, ctl); > + ctl->dev_data = of_device_get_match_data(dev); > + > + return imx_blk_ctl_register(dev); > +} > + > +static const struct of_device_id imx_blk_ctl_of_match[] = { > + { .compatible = "fsl,imx8mm-vpumix-blk-ctl", .data = &imx8mm_vpumix_blk_ctl_dev_data }, > + { .compatible = "fsl,imx8mm-dispmix-blk-ctl", .data = &imx8mm_dispmix_blk_ctl_dev_data }, > + { /* Sentinel */ } > +}; > +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match); > + > +static struct platform_driver imx_blk_ctl_driver = { > + .probe = imx8mm_blk_ctl_probe, > + .driver = { > + .name = "imx8mm-blk-ctl", > + .of_match_table = of_match_ptr(imx_blk_ctl_of_match), > + .pm = &imx_blk_ctl_pm_ops, > + }, > +}; > +module_platform_driver(imx_blk_ctl_driver); >