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Subject: Re: [PATCH] KVM/VMX: Invoke NMI non-IST entry instead of IST entry
To:     Maxim Levitsky <mlevitsk@redhat.com>,
        Thomas Gleixner <tglx@linutronix.de>,
        Lai Jiangshan <jiangshanlai@gmail.com>,
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        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
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        Juergen Gross <jgross@suse.com>,
        Joerg Roedel <jroedel@suse.de>, Jian Cai <caij2003@gmail.com>
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From:   Paolo Bonzini <pbonzini@redhat.com>
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Date:   Tue, 4 May 2021 23:12:12 +0200
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On 04/05/21 23:05, Maxim Levitsky wrote:
> Does this mean that we still rely on hardware NMI masking to be activated?

No, the NMI code already handles reentrancy at both the assembly and C 
levels.

> Or in other words, that is we still can't have an IRET between VM exit and
> the entry to the NMI handler?

No, because NMIs are not masked on VM exit.  This in fact makes things 
potentially messy; unlike with AMD's CLGI/STGI, only MSRs and other 
things that Intel thought can be restored atomically with the VM exit.

Paolo