Received: by 2002:a05:6a10:a852:0:0:0:0 with SMTP id d18csp148344pxy; Tue, 4 May 2021 21:33:22 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxbCKH/R+dBJXVAasSKSzlFbQc7LivkXUFucMxtKGdrRSkUFu1GS8aA0qaQfl7N9Ah8Z199 X-Received: by 2002:a17:906:5855:: with SMTP id h21mr25731383ejs.522.1620189202236; Tue, 04 May 2021 21:33:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620189202; cv=none; d=google.com; s=arc-20160816; b=lpVJ8b9iOUxpPRGqIKDvejZB2/232aFTg5DPwi+n0pILmR12wymbJhdN0alBr/D/Fd l9XksHBd/MZlcV2BTUM2Vrd8SvfWyYeJ1MJxn7Sn072m9hd20o8PutjQd7+JCSM+Af3+ 992YFL/7Ix99TPm6LkYyIQXL9eI3DJwHFqtqUniz9BZqjJK2BqrpGU50LN36ccZbrZTU 2NBkRqVq6/fvLYmavDzBSUl7DeQeWg8H8AYNqIqgY4lYOljAo4PG0MC0bS1SXOKMmY5d r1QwMFBdXUjqyPLZXh1DFCSJNPQDNVaxz7BUeo6zQE1sFjI72Y+LdhkFgrTKEnDCZbtY iNaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:cc:to:subject :message-id:date:from:in-reply-to:references:mime-version :dkim-signature; bh=MWSpjxBHV1vRQCEcIIgUFYsW0arewhxrx2qqTW/rPlY=; b=wymGlZTKISXgmpWKxqL49yMleHHQ0szqMzOU4yVcHWhPTTbpJE/DoR/HZu1TTiVoJf TdlnWRu0TS+8SpdbHxkq+1lLdY/vn+HwjZG4oFn+cEHqEHF41aRkcElnXrhQVRPO5AOp DJ/O3mC+T+83ls1BGTrwWO9NPcB7J5bJ3jsAX+5BzZfFk6n19vWNUP+CmF4JKmrSpY7s 83sblCRVPnBFKnYbjcI03l05Pwq8jxDLO6VCFArxRFl/C3U6fM6dJsOXgct09Lb8Hln1 ts6WcCTdYhW9iECugXc/Vr0JIqQM1g1he63s25SEUAAm82oPNe8sAOnVEtyU6s2v+aAu pglQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=eG4DO5aZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r24si8817393edm.99.2021.05.04.21.32.37; Tue, 04 May 2021 21:33:22 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=eG4DO5aZ; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231313AbhEEE2f (ORCPT + 99 others); Wed, 5 May 2021 00:28:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45914 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231380AbhEEE2a (ORCPT ); Wed, 5 May 2021 00:28:30 -0400 Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 35362C06174A for ; Tue, 4 May 2021 21:26:44 -0700 (PDT) Received: by mail-qk1-x72f.google.com with SMTP id q136so411790qka.7 for ; Tue, 04 May 2021 21:26:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=MWSpjxBHV1vRQCEcIIgUFYsW0arewhxrx2qqTW/rPlY=; b=eG4DO5aZCjdAptZWJyANSIWrnjQfoI+YnXphlXLmQkVHW2OlYy15msNEav3uhLMHv+ 9MC/49Ilp4ZUGHTZ91k1Ztq8VXZ2uQSVkHGeyblBNhtAfJ/YyYKFdWPXBjBocTAWnRIM xNsyfLfBo83J+sPbjEojQCHGGi8NYXE4aDpKBLoaqOjgQDifZaLk5OyDBgE2i0d3vGh8 SK9AnSO5usHR4SWn950rRy8EzLZraCq90VeDCdzstYUKx4Yh0W1qka2UuaQlmaLu7agB IvNIuhwuWm/QYlxp+BzrW6JNQs30u2smfSWsYf4m6c8GnnrGfiAFwEHjRcHArXFI6tsu XDTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=MWSpjxBHV1vRQCEcIIgUFYsW0arewhxrx2qqTW/rPlY=; b=llSF0NoLOFmY2WTE2KZqMk3XA8gevRoP8ZQynx+uHwmxVXAY/pPaM6DOE2PMLD0XoA pAVfhFmoee8U0jFTnWj75wH2WUR7X1cIZESNwOG8ONNHECB7Xs5tl3z2UmcwE+isk/TY m80QpzBbuPkGhI/yg8IdFgM3wK1hQwo2b+Y1uRIT096zHgDznRKp7iWMVOhKkQ0KLn78 rzgjmxClhFP9Tv1eXk8z1wnZSdAgojeFrXDfoAed4q1gX808HhVHtkLs7yMtk6V8nnT6 JaOPP+kdL8PycDr4Z19W1yPtHQgo01/ukIYmT8P56aXL3ky6ST/RIgqhJIgs4NB6mP3V 3kUw== X-Gm-Message-State: AOAM530A5XvdQCuWF8vZW2ndR1pnbFEczShVMyI8AUt0FCZpVSN1++KN a6mocphtLgv87qv+blV2kECu6FWIUgA/wtzv2nazgA== X-Received: by 2002:a05:620a:29c4:: with SMTP id s4mr25568588qkp.401.1620188803215; Tue, 04 May 2021 21:26:43 -0700 (PDT) MIME-Version: 1.0 References: <20210504105940.100004-6-greentime.hu@sifive.com> <20210504134632.GA1088165@bjorn-Precision-5520> In-Reply-To: <20210504134632.GA1088165@bjorn-Precision-5520> From: Greentime Hu Date: Wed, 5 May 2021 12:26:31 +0800 Message-ID: Subject: Re: [PATCH v6 5/6] PCI: fu740: Add SiFive FU740 PCIe host controller driver To: Bjorn Helgaas Cc: Paul Walmsley , hes@sifive.com, Erik Danie , Zong Li , Bjorn Helgaas , robh+dt@kernel.org, Albert Ou , Michael Turquette , Stephen Boyd , Lorenzo Pieralisi , Philipp Zabel , alex.dewar90@gmail.com, khilman@baylibre.com, hayashi.kunihiko@socionext.com, vidyas@nvidia.com, jh80.chung@samsung.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv , Linux Kernel Mailing List , linux-clk@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Bjorn Helgaas =E6=96=BC 2021=E5=B9=B45=E6=9C=884=E6=97= =A5 =E9=80=B1=E4=BA=8C =E4=B8=8B=E5=8D=889:46=E5=AF=AB=E9=81=93=EF=BC=9A > > On Tue, May 04, 2021 at 06:59:39PM +0800, Greentime Hu wrote: > > From: Paul Walmsley > > > > Add driver for the SiFive FU740 PCIe host controller. > > This controller is based on the DesignWare PCIe core. > > > > Signed-off-by: Paul Walmsley > > Co-developed-by: Henry Styles > > Signed-off-by: Henry Styles > > Co-developed-by: Erik Danie > > Signed-off-by: Erik Danie > > Co-developed-by: Greentime Hu > > Signed-off-by: Greentime Hu > > --- > > drivers/pci/controller/dwc/Kconfig | 10 + > > drivers/pci/controller/dwc/Makefile | 1 + > > drivers/pci/controller/dwc/pcie-fu740.c | 309 ++++++++++++++++++++++++ > > 3 files changed, 320 insertions(+) > > create mode 100644 drivers/pci/controller/dwc/pcie-fu740.c > > > > diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controlle= r/dwc/Kconfig > > index 22c5529e9a65..255d43b1661b 100644 > > --- a/drivers/pci/controller/dwc/Kconfig > > +++ b/drivers/pci/controller/dwc/Kconfig > > @@ -318,4 +318,14 @@ config PCIE_AL > > required only for DT-based platforms. ACPI platforms with the > > Annapurna Labs PCIe controller don't need to enable this. > > > > +config PCIE_FU740 > > + bool "SiFive FU740 PCIe host controller" > > + depends on PCI_MSI_IRQ_DOMAIN > > + depends on SOC_SIFIVE || COMPILE_TEST > > + depends on GPIOLIB > > 1) I'm a little disappointed that I reported the build issue 6 days > ago when we were already in the merge window, and it's taken until > now to make some progress. > > 2) I would prefer not to depend on GPIOLIB because it reduces > compile-test coverage. For example, the x86_64 defconfig does not > enable GPIOLIB, so one must manually enable it to even be able to > enable PCIE_FU740. > > Many other PCI controller drivers use GPIO, but no others depend on > GPIOLIB, so I infer that in the !GPIOLIB case, gpio/consumer.h > provides the stubs required for compile testing. > > We could have a conversation about whether it's better to > explicitly depend on GPIOLIB here, or whether building a working > FU740 driver implicitly depends on GPIOLIB being selected > elsewhere. That implicit dependency *is* a little obscure, but I > think that's what other drivers currently do, and I'd like to do > this consistently unless there's a good reason otherwise. > > Here are some examples of other drivers: > > dwc/pci-dra7xx.c: > config PCI_DRA7XX_HOST > depends on SOC_DRA7XX || COMPILE_TEST > > config SOC_DRA7XX > select ARCH_OMAP2PLUS > > config ARCH_OMAP2PLUS > select GPIOLIB > > dwc/pci-meson.c: > config PCI_MESON > # doesn't, but probably *should* depend on "ARCH_MESON || COMPILE_= TEST" > > menuconfig ARCH_MESON > select GPIOLIB > > dwc/pcie-qcom.c: > config PCIE_QCOM > depends on OF && (ARCH_QCOM || COMPILE_TEST) > > config ARCH_QCOM > select GPIOLIB > > pcie-rockchip.c: > config PCIE_ROCKCHIP_HOST > depends on ARCH_ROCKCHIP || COMPILE_TEST > > config ARCH_ROCKCHIP > select GPIOLIB > > > + select PCIE_DW_HOST > > + help > > + Say Y here if you want PCIe controller support for the SiFive > > + FU740. > > + > > endmenu Hi, Sorry for late to debug this case. I was working on other works and just missed the email. How about this? diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index e1b2690b6e45..66f57f2db49d 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -7,6 +7,7 @@ config SOC_SIFIVE select CLK_SIFIVE select CLK_SIFIVE_PRCI select SIFIVE_PLIC + select GPIOLIB if PCIE_FU740 help This enables support for SiFive SoC platform hardware. diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig index 255d43b1661b..0a37d21ed64e 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -322,7 +322,6 @@ config PCIE_FU740 bool "SiFive FU740 PCIe host controller" depends on PCI_MSI_IRQ_DOMAIN depends on SOC_SIFIVE || COMPILE_TEST - depends on GPIOLIB select PCIE_DW_HOST help Say Y here if you want PCIe controller support for the SiFive