Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates
 216.228.112.34 as permitted sender) receiver=protection.outlook.com;
 client-ip=216.228.112.34; helo=mail.nvidia.com;
Subject: Re: [PATCH v4 2/2] PCI: Enable NO_BUS_RESET quirk for Nvidia GPUs
To:     Bjorn Helgaas <helgaas@kernel.org>
CC:     Alex Williamson <alex.williamson@redhat.com>,
        Bjorn Helgaas <bhelgaas@google.com>,
        <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        Sinan Kaya <okaya@kernel.org>,
        Vikram Sethi <vsethi@nvidia.com>,
        Jason Sequeira <jsequeira@nvidia.com>
References: <20210505021236.GA1244944@bjorn-Precision-5520>
From:   Shanker R Donthineni <sdonthineni@nvidia.com>
Message-ID: <b94ef9dd-4f44-724a-6264-fc3b571be85d@nvidia.com>
Date:   Tue, 4 May 2021 22:51:02 -0500
User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101
 Thunderbird/68.10.0
MIME-Version: 1.0
In-Reply-To: <20210505021236.GA1244944@bjorn-Precision-5520>
Content-Type: text/plain; charset="utf-8"
Content-Transfer-Encoding: 7bit
Content-Language: en-US
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2021 03:51:15.1514
 (UTC)
X-MS-Exchange-CrossTenant-Network-Message-Id: f3be3e0b-acf6-416c-59b4-08d90f79083d
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.34];Helo=[mail.nvidia.com]
X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT010.eop-nam11.prod.protection.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Anonymous
X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem
X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1PR12MB2367
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org


Hi Bjorn,

On 5/4/21 9:12 PM, Bjorn Helgaas wrote:
> Maybe I'm missing something, but I don't see how _RST can work for
> plug-in devices.  _RST is part of the system firmware, and that
> firmware knows nothing about what will be plugged into the slot.  So
> if system firmware supplies _RST that knows how to reset the Nvidia
> GPU, it's not going to do the right thing if you plug in an NVMe
> device instead.
>
> Can you elaborate on how _RST would work for plug-in devices?  My only
> point here is that IF this GPU is ever on a plug-in card, neither _RST
> nor SBR would work, so we'd have to use whatever other reset methods
> *do* work (I guess only FLR?)
Sorry, if my explanation was not clear earlier.

These NVIDIA GPUs which need SBR quirk are not hot-plug-able devices, they
will exist only on server baseboards and directly attached to RP/SwitchPorts.
In this case ACPI based reset will be applied to GPUs always.

Agree the RST method is a platform specific firmware implementation and
can't be used for other devices without probing the device PCI config space.
It would be possible to enhance RST implementation, probe config space
using ECAM, check vendorID/deviceID, and do FLR if the non-GPU device is
plugged-in.