Received: by 2002:a05:6a10:a852:0:0:0:0 with SMTP id d18csp462871pxy; Wed, 5 May 2021 06:31:16 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyHNshPQ6TAigyiqIme+zLZq/ZtV+ULsDoyDYrJAH3oGlGX1vn+tcf87w1pTGfNFAH9+vud X-Received: by 2002:aa7:d705:: with SMTP id t5mr32016529edq.141.1620221476207; Wed, 05 May 2021 06:31:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620221476; cv=none; d=google.com; s=arc-20160816; b=dhhSbgoi+gGc6/RQ6KJY5QDedyNE0wKhlm4yAZGxOzLPlKoVR8CYdzNKde9ylOLrm2 AKxnNQhU59znrLP9S4+Nw1YOJWHhFwZM8AHvBC/YPCDLZL0PDhUISVdZskE2dmvr8VO1 yiT8cXD7r68xYFvr3qwRD1R7wngIKz8cXbjDHGsYDA711tQO+JA9rGGsELExeifnYjYt staNBTRD6S47SnsAVcWlG4LSaxZM79apsrkqTjODjPy1ztr3ou5hjylhU4Cby9wOyQQj lr5yh0y8mfloZk5EQpHbK376Cn1Eb4aANn/jOoyRln0bhC2jNPQsziSkAGh3WCKZxgSh GeSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:in-reply-to:content-disposition:mime-version :references:message-id:subject:cc:to:from:date; bh=YTAmVCfzX/9mf5ZjDJRmz0al8b7KMKS5kCuuFNmNqu8=; b=krWdr10uozO2W8j7r1Ggh6r+a9thz92Ee0seryMbtNkBa1vUKRA+NeJUCrIEVjtbZV IccYeePi3DQ4pRFHOys/DgBKglr7G6DnvxVZrz+I0Z6II3vgQ15aZ5vr81hewLS02+gg Ke7xaC8v7hzDRHGtbnoRl0kNK2xa/gF3ktpICHS+3JaUzyWgNXcUC24pENUk9Bu9HXUz sjCRJcFeDoJ3I/XRTZ4avKgh5RGAU3EyNpe0pedOMVEO2Iornuj8oajmnw27gSlNjOVI /AAJRi/JnTJPxy2YhwPr02quBv1yDZi0ydtjeVsxYKUBmPUAzDEGFGrYKzccnrhexdEY hXQQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d11si5295005ejm.20.2021.05.05.06.30.50; Wed, 05 May 2021 06:31:16 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233525AbhEEMij (ORCPT + 99 others); Wed, 5 May 2021 08:38:39 -0400 Received: from vps0.lunn.ch ([185.16.172.187]:54376 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233111AbhEEMig (ORCPT ); Wed, 5 May 2021 08:38:36 -0400 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1leGmV-002fjT-5R; Wed, 05 May 2021 14:37:35 +0200 Date: Wed, 5 May 2021 14:37:35 +0200 From: Andrew Lunn To: Oleksij Rempel Cc: Woojung Huh , UNGLinuxDriver@microchip.com, Florian Fainelli , Vivien Didelot , Vladimir Oltean , "David S. Miller" , Jakub Kicinski , kernel@pengutronix.de, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, Russell King , Michael Grzeschik Subject: Re: [RFC PATCH v1 5/9] net: phy: micrel: ksz886x add MDI-X support Message-ID: References: <20210505092025.8785-1-o.rempel@pengutronix.de> <20210505092025.8785-6-o.rempel@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210505092025.8785-6-o.rempel@pengutronix.de> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org > +/* Device specific MII_BMCR (Reg 0) bits */ > +/* 1 = HP Auto MDI/MDI-X mode, 0 = Microchip Auto MDI/MDI-X mode */ > +#define KSZ886X_BMCR_HP_MDIX BIT(5) > +/* 1 = Force MDI (transmit on RXP/RXM pins), 0 = Normal operation > + * (transmit on TXP/TXM pins) > + */ > +#define KSZ886X_BMCR_FORCE_MDI BIT(4) > +/* 1 = Disable auto MDI-X */ > +#define KSZ886X_BMCR_DISABLE_AUTO_MDIX BIT(3) > +#define KSZ886X_BMCR_DISABLE_FAR_END_FAULT BIT(2) > +#define KSZ886X_BMCR_DISABLE_TRANSMIT BIT(1) > +#define KSZ886X_BMCR_DISABLE_LED BIT(0) Do these have the same values as what you added in patch 1? > +static int ksz886x_config_mdix(struct phy_device *phydev, u8 ctrl) > +{ > + u16 val; > + > + switch (ctrl) { > + case ETH_TP_MDI: > + val = KSZ886X_BMCR_DISABLE_AUTO_MDIX; > + break; > + case ETH_TP_MDI_X: > + /* Note: The naming of the bit KSZ886X_BMCR_FORCE_MDI is bit > + * counter intuitive, the "-X" in "1 = Force MDI" in the data > + * sheet seems to be missing: > + * 1 = Force MDI (sic!) (transmit on RX+/RX- pins) > + * 0 = Normal operation (transmit on TX+/TX- pins) > + */ > + val = KSZ886X_BMCR_DISABLE_AUTO_MDIX | KSZ886X_BMCR_FORCE_MDI; > + break; > + case ETH_TP_MDI_AUTO: > + val = 0; > + break; > + default: > + return 0; > + } > + > + return phy_modify(phydev, MII_BMCR, > + KSZ886X_BMCR_HP_MDIX | KSZ886X_BMCR_FORCE_MDI | > + KSZ886X_BMCR_DISABLE_AUTO_MDIX, > + KSZ886X_BMCR_HP_MDIX | val); > +} Maybe this will also work for the PHY driver embedded in ksz8795.c? Maybe as another patchset, see if that PHY driver can be moved out of the DSA driver, and share some code with this driver? Andrew