Received: by 2002:a05:6a10:a852:0:0:0:0 with SMTP id d18csp641576pxy; Wed, 5 May 2021 10:07:54 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw+c8G6JKBx/1Q/bS+J5wpCFoAvMHu8GshHMZ4PJDx+co4m9mMtZvM8feMTpipKKtDpmzpC X-Received: by 2002:a65:620d:: with SMTP id d13mr29306424pgv.85.1620234474034; Wed, 05 May 2021 10:07:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620234474; cv=none; d=google.com; s=arc-20160816; b=FJmVThMmvOLtjTm+rSAgxOP7E/ZUFvGh119QMq6MJHs5h/hg+raMR0M8QsUkaFiYI9 a19z7FYFruoUsiHrB7VgyvOMB7ZUJEFLKDdIrxl84z6NwrukreeY4K8t5nnq3AGNTKVe mNgf8r8YdThjuF2FvwE7HKmW7e1fQCcsjjLutnY5ZKGXkjhJh5YV2rk4vQRwh71djdU9 FNR5vZoTkB7Vz+SGFffriaSMOcDWkdc2Dhxr5RN1HQtTF0s5RwLlFau6tmSXRP0NjQne bRAONBnliw7q8ATbUeaywF7X/LC0W0NuT8YdjRRjQo2zJJVuWng7R97w8RJJSmOC4/hq k4ng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=PpF/j0V7H9JsUpDjgiqYGGZHLnsK5Wc+RNb15z6uvCM=; b=bS3t9UlVrhe8J0Kl3mLVTNR5S2CxWUfp2kvMNu1R6Awd1HaeZC2lu/qtRbYBlNFEgi /A8Gsr5Ss0OcdVkzb8z1s4GCxrYRutaUGyPNSTf9NUZab+gJO/BD6rZjmGywzCh8VmZy E7caiCbtelYbKxbO/qRImWsXgSmx9v1+3lrFa6CEZ9BYxFYEbsXA6ZbH4qr9pM54vlW/ 7Lj5XWYHxTnf7nijpAgzu2P3TLH9OhpdtsH6IrgvcaOsQp++STwIHBL2v1D24+sVrBTL MvAKpBm+xWbz4DMHjLmIWH5m3/B7HWGOjYn2pMWwPXhMxltFJZRBdVYxiVvOLRiTv3+n GRWQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b14si8532166plh.198.2021.05.05.10.07.39; Wed, 05 May 2021 10:07:54 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236694AbhEERFH (ORCPT + 99 others); Wed, 5 May 2021 13:05:07 -0400 Received: from hostingweb31-40.netsons.net ([89.40.174.40]:33694 "EHLO hostingweb31-40.netsons.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235844AbhEEQ4f (ORCPT ); Wed, 5 May 2021 12:56:35 -0400 Received: from [77.244.183.192] (port=65286 helo=[192.168.178.41]) by hostingweb31.netsons.net with esmtpsa (TLS1.2) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.94.2) (envelope-from ) id 1leKo8-0004SH-Tg; Wed, 05 May 2021 18:55:33 +0200 Subject: Re: [PATCH] clk: vc5: fix output disabling when enabling a FOD To: Adam Ford Cc: linux-clk , Michael Turquette , Stephen Boyd , Linux Kernel Mailing List References: <20210409125732.376589-1-luca@lucaceresoli.net> From: Luca Ceresoli Message-ID: Date: Wed, 5 May 2021 18:55:32 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-AntiAbuse: This header was added to track abuse, please include it with any abuse report X-AntiAbuse: Primary Hostname - hostingweb31.netsons.net X-AntiAbuse: Original Domain - vger.kernel.org X-AntiAbuse: Originator/Caller UID/GID - [47 12] / [47 12] X-AntiAbuse: Sender Address Domain - lucaceresoli.net X-Get-Message-Sender-Via: hostingweb31.netsons.net: authenticated_id: luca@lucaceresoli.net X-Authenticated-Sender: hostingweb31.netsons.net: luca@lucaceresoli.net X-Source: X-Source-Args: X-Source-Dir: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Adam, thanks for reviewing. On 05/05/21 14:59, Adam Ford wrote: [...] >> @@ -581,6 +585,23 @@ static int vc5_clk_out_prepare(struct clk_hw *hw) >> unsigned int src; >> int ret; >> >> + /* >> + * When enabling a FOD, all currently enabled FODs are briefly >> + * stopped in order to synchronize all of them. This causes a clock >> + * disruption to any unrelated chips that might be already using >> + * other clock outputs. Bypass the sync feature to avoid the issue, >> + * which is possible on the VersaClock 6E family via reserved >> + * registers. >> + */ > > Thanks for the comments here. I with IDT/Renesas would better > document this. The support person who assisted me said he would suggest to document this better. It would be good if you could add to their work. > I might see if I can convince one of the hardware guys > at my office to test the impact of radiated emissions. That would be interesting to know, sure. -- Luca