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Date:   Fri, 7 May 2021 16:50:04 +0100
From:   Mark Brown <broonie@kernel.org>
To:     Pratyush Yadav <p.yadav@ti.com>
Cc:     Tudor Ambarus <tudor.ambarus@microchip.com>,
        Michael Walle <michael@walle.cc>,
        Miquel Raynal <miquel.raynal@bootlin.com>,
        Richard Weinberger <richard@nod.at>,
        Vignesh Raghavendra <vigneshr@ti.com>,
        linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-spi@vger.kernel.org
Subject: Re: [PATCH 0/6] Avoid odd length/address read/writes in 8D-8D-8D
 mode.
Message-ID: <20210507155004.GF6383@sirena.org.uk>
References: <20210506191829.8271-1-p.yadav@ti.com>
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On Fri, May 07, 2021 at 12:48:23AM +0530, Pratyush Yadav wrote:

> Patch 4 should go through the SPI tree but I have included it in this
> series because if it goes in before patches 1-3, Micron MT35XU and
> Cypress S28HS flashes will stop working correctly.

It probably makes sense to apply these to the MTD tree and then send me
a pull request to avoid any future conflicts with SPI.

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