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Fri, 7 May 2021 23:21:40 +0000 Subject: Re: [PATCH 2/2] KVM: x86: Allow userspace to update tracked sregs for protected guests To: Sean Christopherson , Paolo Bonzini Cc: Vitaly Kuznetsov , Wanpeng Li , Jim Mattson , Joerg Roedel , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Gonda , Maxim Levitsky References: <20210507165947.2502412-1-seanjc@google.com> <20210507165947.2502412-3-seanjc@google.com> From: Tom Lendacky Message-ID: <5f084672-5c0d-a6f3-6dcf-38dd76e0bde0@amd.com> Date: Fri, 7 May 2021 18:21:37 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.1 In-Reply-To: <20210507165947.2502412-3-seanjc@google.com> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [67.79.209.213] X-ClientProxiedBy: SA0PR11CA0188.namprd11.prod.outlook.com (2603:10b6:806:1bc::13) To DM5PR12MB1355.namprd12.prod.outlook.com (2603:10b6:3:6e::7) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from office-linux.texastahm.com (67.79.209.213) by SA0PR11CA0188.namprd11.prod.outlook.com (2603:10b6:806:1bc::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4108.24 via Frontend Transport; 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KVM > tracks the aforementioned registers by trapping guest writes, and also > exposes the values to userspace via KVM_GET_SREGS. Skipping the regs > in KVM_SET_SREGS prevents userspace from updating KVM's CPU model to > match the known hardware state. This is very similar to the original patch I had proposed that you were against :) I'm assuming it's meant to make live migration a bit easier? > > Fixes: 5265713a0737 ("KVM: x86: Update __get_sregs() / __set_sregs() to support SEV-ES") > Reported-by: Peter Gonda > Cc: stable@vger.kernel.org > Cc: Maxim Levitsky > Signed-off-by: Sean Christopherson Acked-by: Tom Lendacky > --- > arch/x86/kvm/x86.c | 73 ++++++++++++++++++++++++++-------------------- > 1 file changed, 42 insertions(+), 31 deletions(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 3bf52ba5f2bb..1b7d0e97c82b 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -9963,21 +9963,25 @@ static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) > if (kvm_set_apic_base(vcpu, &apic_base_msr)) > goto out; > > - if (vcpu->arch.guest_state_protected) > - goto skip_protected_regs; > + if (!vcpu->arch.guest_state_protected) { > + dt.size = sregs->idt.limit; > + dt.address = sregs->idt.base; > + static_call(kvm_x86_set_idt)(vcpu, &dt); > + dt.size = sregs->gdt.limit; > + dt.address = sregs->gdt.base; > + static_call(kvm_x86_set_gdt)(vcpu, &dt); > > - dt.size = sregs->idt.limit; > - dt.address = sregs->idt.base; > - static_call(kvm_x86_set_idt)(vcpu, &dt); > - dt.size = sregs->gdt.limit; > - dt.address = sregs->gdt.base; > - static_call(kvm_x86_set_gdt)(vcpu, &dt); > - > - vcpu->arch.cr2 = sregs->cr2; > - mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3; > - vcpu->arch.cr3 = sregs->cr3; > - kvm_register_mark_available(vcpu, VCPU_EXREG_CR3); > + vcpu->arch.cr2 = sregs->cr2; > + mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3; > + vcpu->arch.cr3 = sregs->cr3; > + kvm_register_mark_available(vcpu, VCPU_EXREG_CR3); > + } > > + /* > + * Writes to CR0, CR4, CR8, and EFER are trapped (after the instruction > + * completes) for SEV-EV guests, thus userspace is allowed to set them > + * so that KVM's model can be updated to mirror hardware state. > + */ > kvm_set_cr8(vcpu, sregs->cr8); > > mmu_reset_needed |= vcpu->arch.efer != sregs->efer; > @@ -9990,35 +9994,42 @@ static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs) > mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4; > static_call(kvm_x86_set_cr4)(vcpu, sregs->cr4); > > - idx = srcu_read_lock(&vcpu->kvm->srcu); > - if (is_pae_paging(vcpu)) { > + /* > + * PDPTEs, like regular PTEs, are always encrypted, thus reading them > + * will return garbage. Shadow paging, including nested NPT, isn't > + * compatible with protected guests, so ignoring the PDPTEs is a-ok. > + */ > + if (!vcpu->arch.guest_state_protected && is_pae_paging(vcpu)) { > + idx = srcu_read_lock(&vcpu->kvm->srcu); > load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu)); > + srcu_read_unlock(&vcpu->kvm->srcu, idx); > + > mmu_reset_needed = 1; > } > - srcu_read_unlock(&vcpu->kvm->srcu, idx); > > if (mmu_reset_needed) > kvm_mmu_reset_context(vcpu); > > - kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); > - kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); > - kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES); > - kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); > - kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); > - kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); > + if (!vcpu->arch.guest_state_protected) { > + kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS); > + kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS); > + kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES); > + kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS); > + kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS); > + kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS); > > - kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); > - kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); > + kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR); > + kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR); > > - update_cr8_intercept(vcpu); > + update_cr8_intercept(vcpu); > > - /* Older userspace won't unhalt the vcpu on reset. */ > - if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 && > - sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 && > - !is_protmode(vcpu)) > - vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; > + /* Older userspace won't unhalt the vcpu on reset. */ > + if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 && > + sregs->cs.selector == 0xf000 && > + sregs->cs.base == 0xffff0000 && !is_protmode(vcpu)) > + vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; > + } > > -skip_protected_regs: > max_bits = KVM_NR_INTERRUPTS; > pending_vec = find_first_bit( > (const unsigned long *)sregs->interrupt_bitmap, max_bits); >