Received: by 2002:a05:6a10:206:0:0:0:0 with SMTP id 6csp1092096pxj; Sat, 8 May 2021 07:28:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzArBPqDSOMZDmM8ercb7S2GjGh2PSPw3+8g2269h1VhmibknzccJuJbcAC/waHJVkqjqR0 X-Received: by 2002:a05:6e02:16ca:: with SMTP id 10mr8748645ilx.65.1620484121903; Sat, 08 May 2021 07:28:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1620484121; cv=none; d=google.com; s=arc-20160816; b=iaSCXJ/T1CrpW6j0clDJL7hQa7asPHKLLHAMFlpYpkTjGOp4KO120arDDSGRCIZoc9 CKoeRGA9DtHY/kwxbGXaArR5mlNmFQMrhQGC7eG2UnC1grJ35AT4srGCxsFaKK5NrnLr WR7V8rrQcaBRWUZqjtMSbslcGTmmi2ERVLAcWhNoXbRAQ5XhQ/nECSisYYVnyjZp9h6+ /4tif5RFHN1kO9whNkMTvL5aJ9T7h0pTNUgPAOoljKmiqV3L6VmFC1NuTi/H5mJkbFxC 5uwGLagd4xlh5dNhsF6/e4yNKd+8yIyGmFswWRYZUFlUN5tbs5SiFZeJK2VJYSAEhTNz tyKQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=sTRqbY7hrIXraUvH9aqtqJaQfeUI3cujVz32DQAhoJU=; b=hd+YXH3LE0kLt9q8YSFhm+zZjdzAgyLSHP++kcggsfgylWoyhuksAsu8+SopP3DWIJ ankZONOJ+U37JFT2INohRId1feuWxcseLRiGAR6ZpA3SgoGQ7EXv3mXNfMxZvWJVojxh LeGabHYsjgbuHGMf4UjbUgFcLEbLl2WewK2Gv1CKJBI2JGBbuiUokPYfOZypWGlZM4RT 4oRKk2yXy7PvofuYi4gTp1zhQg2vjXGN98rc3osAFjo2WRg2eyJytgW/pMsOrg8OAP2F YlRS8E+eFp2Fe7KVw6aZA8NhFNuhfI6TsGLsM1qBbVHjXAhSK4/px/wg2EJY5ijYAAT+ aFOg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s17si11355084jat.66.2021.05.08.07.28.29; Sat, 08 May 2021 07:28:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229617AbhEHO2j (ORCPT + 99 others); Sat, 8 May 2021 10:28:39 -0400 Received: from lb3-smtp-cloud7.xs4all.net ([194.109.24.31]:49577 "EHLO lb3-smtp-cloud7.xs4all.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229500AbhEHO2i (ORCPT ); Sat, 8 May 2021 10:28:38 -0400 X-Greylist: delayed 428 seconds by postgrey-1.27 at vger.kernel.org; Sat, 08 May 2021 10:28:35 EDT Received: from copland.sibelius.xs4all.nl ([83.163.83.176]) by smtp-cloud7.xs4all.net with ESMTP id fNoalDe3DyEWwfNoblAKIZ; Sat, 08 May 2021 16:20:23 +0200 From: Mark Kettenis To: devicetree@vger.kernel.org Cc: Mark Kettenis , Hector Martin , Linus Walleij , Rob Herring , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 0/2] Apple M1 pinctrl DT bindings Date: Sat, 8 May 2021 16:19:54 +0200 Message-Id: <20210508142000.85116-1-kettenis@openbsd.org> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CMAE-Envelope: MS4xfIi7mPy78jdujl4nZfljyb1v4wn9r4x1+IWMab6Nj9gHNxx7RaGVinDGSRw/qYZhY8oTrwtr4gmXafz43ConQ2CCgsoMy3B6bsK8zY+PmnDv7SAI6oD2 xp+Ai1/X+pA+VVMISo9JGnqCRg0bzjBSKhwmWHyKrcfeywiQox6nAa/zchlxJJDFIBzmPxPpF6cqhRxLUm4R1/+BHicUF9wz87m/bGwlvAcxlkb/3d8tJgfz 65tLrGmHW0u3Zhn8wMqbbTa6NbaMj1wxmlr6l2A8tB41mZbOQG5erlk3dcrXszL4b0SBpjIU5x3Sk4Zodj15q3Dsx8+ZUXu2cOqfHkjW8YM6WWRPscxDcUlb JJRpXJDgnzo13++Rp1ZqaTSw/ngX/ODFhFJXGuJVL0kHNVhxVPrczFPiHGGIoIHnGWa5FwTVldZUzai8O9OiPdBrMw/BkM4lgnxELRYkZmnqctohn8ShKc3b Za0LtCILuV7puZm6 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This small series adds bindings for the pin and GPIO controller found on the Apple M1 SoC. At this point, the primary consumer for these bindings is U-Boot. With the help of these bindings U-Boot can bring up the PCIe root complex into a state where the OS use it without having to deal with the GPIO pins. A Linux driver may be implemented later to support power management and/or other devices that need GPIO control. Since the binding is based on standard pinmux node bindings this should be relatively easy. Mark Kettenis (2): dt-bindings: pinctrl: Add DT bindings for apple,pinctrl arm64: apple: Add pinctrl nodes .../bindings/pinctrl/apple,pinctrl.yaml | 103 ++++++++++++++++++ MAINTAINERS | 2 + arch/arm64/boot/dts/apple/t8103.dtsi | 83 ++++++++++++++ include/dt-bindings/pinctrl/apple.h | 13 +++ 4 files changed, 201 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml create mode 100644 include/dt-bindings/pinctrl/apple.h -- 2.31.1