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Date:   Mon, 10 May 2021 16:18:14 +0100
From:   Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To:     Dan Williams <dan.j.williams@intel.com>
CC:     <linux-cxl@vger.kernel.org>, Ben Widawsky <ben.widawsky@intel.com>,
        <linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
        <linux-acpi@vger.kernel.org>
Subject: Re: [PATCH 6/8] cxl/Kconfig: Default drivers to CONFIG_CXL_BUS
Message-ID: <20210510161814.00007e99@Huawei.com>
In-Reply-To: <162042791307.1202325.2513845748708305095.stgit@dwillia2-desk3.amr.corp.intel.com>
References: <162042787450.1202325.5718541949681409566.stgit@dwillia2-desk3.amr.corp.intel.com>
        <162042791307.1202325.2513845748708305095.stgit@dwillia2-desk3.amr.corp.intel.com>
Organization: Huawei Technologies Research and Development (UK) Ltd.
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On Fri, 7 May 2021 15:51:53 -0700
Dan Williams <dan.j.williams@intel.com> wrote:

> CONFIG_CXL_BUS is default 'n' as expected for new functionality. When
> that is enabled do not make the end user hunt for all the expected
> sub-options to enable. For example CONFIG_CXL_BUS without CONFIG_CXL_MEM
> is an odd/expert configuration, so is CONFIG_CXL_MEM without
> CONFIG_CXL_ACPI (on ACPI capable platforms). Default CONFIG_CXL_MEM and
> CONFIG_CXL_ACPI to CONFIG_CXL_BUS.
> 
> Acked-by: Ben Widawsky <ben.widawsky@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

> ---
>  drivers/cxl/Kconfig |    2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> index fb282af84afd..1da7970a5e55 100644
> --- a/drivers/cxl/Kconfig
> +++ b/drivers/cxl/Kconfig
> @@ -15,6 +15,7 @@ if CXL_BUS
>  
>  config CXL_MEM
>  	tristate "CXL.mem: Memory Devices"
> +	default CXL_BUS
>  	help
>  	  The CXL.mem protocol allows a device to act as a provider of
>  	  "System RAM" and/or "Persistent Memory" that is fully coherent
> @@ -54,6 +55,7 @@ config CXL_MEM_RAW_COMMANDS
>  config CXL_ACPI
>  	tristate "CXL ACPI: Platform Support"
>  	depends on ACPI
> +	default CXL_BUS
>  	help
>  	  Enable support for host managed device memory (HDM) resources
>  	  published by a platform's ACPI CXL memory layout description.
>