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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id v28sm2819594ood.27.2021.05.10.09.12.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 10 May 2021 09:12:35 -0700 (PDT) Received: (nullmailer pid 216890 invoked by uid 1000); Mon, 10 May 2021 16:12:34 -0000 Date: Mon, 10 May 2021 11:12:34 -0500 From: Rob Herring To: Johan Jonker Cc: heiko@sntech.de, linus.walleij@linaro.org, bgolaszewski@baylibre.com, jay.xu@rock-chips.com, shawn.lin@rock-chips.com, david.wu@rock-chips.com, zhangqing@rock-chips.com, huangtao@rock-chips.com, cl@rock-chips.com, linux-gpio@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 2/4] dt-bindings: soc: rockchip: convert grf.txt to YAML Message-ID: <20210510161234.GA210306@robh.at.kernel.org> References: <20210508123743.18128-1-jbx6244@gmail.com> <20210508123743.18128-3-jbx6244@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210508123743.18128-3-jbx6244@gmail.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, May 08, 2021 at 02:37:41PM +0200, Johan Jonker wrote: > Current dts files with 'grf' nodes are manually verified. > In order to automate this process grf.txt has to be > converted to YAML. > > Most compatibility strings are in use with "simple-mfd" added. > > Add description already in use: > "rockchip,rv1108-pmugrf", "syscon" > > Add new descriptions for: > "rockchip,rk3568-grf", "syscon", "simple-mfd" > "rockchip,rk3568-pmugrf", "syscon", "simple-mfd" > > Signed-off-by: Johan Jonker > --- > > Changed V3: > remove select > change unevaluatedProperties > add separate schemas for each 'if' subset Sorry, but by separate I meant different files. But you don't *have* to do that. > > Changed V2: > add rockchip,rk3328-grf-gpio.yaml > rename grf-gpio nodename > --- > .../devicetree/bindings/soc/rockchip/grf.txt | 61 ----- > .../devicetree/bindings/soc/rockchip/grf.yaml | 262 +++++++++++++++++++++ > 2 files changed, 262 insertions(+), 61 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.txt > create mode 100644 Documentation/devicetree/bindings/soc/rockchip/grf.yaml > > diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.txt b/Documentation/devicetree/bindings/soc/rockchip/grf.txt > deleted file mode 100644 > index f96511aa3..000000000 > --- a/Documentation/devicetree/bindings/soc/rockchip/grf.txt > +++ /dev/null > @@ -1,61 +0,0 @@ > -* Rockchip General Register Files (GRF) > - > -The general register file will be used to do static set by software, which > -is composed of many registers for system control. > - > -From RK3368 SoCs, the GRF is divided into two sections, > -- GRF, used for general non-secure system, > -- SGRF, used for general secure system, > -- PMUGRF, used for always on system > - > -On RK3328 SoCs, the GRF adds a section for USB2PHYGRF, > - > -ON RK3308 SoC, the GRF is divided into four sections: > -- GRF, used for general non-secure system, > -- SGRF, used for general secure system, > -- DETECTGRF, used for audio codec system, > -- COREGRF, used for pvtm, > - > -Required Properties: > - > -- compatible: GRF should be one of the following: > - - "rockchip,px30-grf", "syscon": for px30 > - - "rockchip,rk3036-grf", "syscon": for rk3036 > - - "rockchip,rk3066-grf", "syscon": for rk3066 > - - "rockchip,rk3188-grf", "syscon": for rk3188 > - - "rockchip,rk3228-grf", "syscon": for rk3228 > - - "rockchip,rk3288-grf", "syscon": for rk3288 > - - "rockchip,rk3308-grf", "syscon": for rk3308 > - - "rockchip,rk3328-grf", "syscon": for rk3328 > - - "rockchip,rk3368-grf", "syscon": for rk3368 > - - "rockchip,rk3399-grf", "syscon": for rk3399 > - - "rockchip,rv1108-grf", "syscon": for rv1108 > -- compatible: DETECTGRF should be one of the following: > - - "rockchip,rk3308-detect-grf", "syscon": for rk3308 > -- compatilbe: COREGRF should be one of the following: > - - "rockchip,rk3308-core-grf", "syscon": for rk3308 > -- compatible: PMUGRF should be one of the following: > - - "rockchip,px30-pmugrf", "syscon": for px30 > - - "rockchip,rk3368-pmugrf", "syscon": for rk3368 > - - "rockchip,rk3399-pmugrf", "syscon": for rk3399 > -- compatible: SGRF should be one of the following: > - - "rockchip,rk3288-sgrf", "syscon": for rk3288 > -- compatible: USB2PHYGRF should be one of the following: > - - "rockchip,px30-usb2phy-grf", "syscon": for px30 > - - "rockchip,rk3328-usb2phy-grf", "syscon": for rk3328 > -- compatible: USBGRF should be one of the following: > - - "rockchip,rv1108-usbgrf", "syscon": for rv1108 > -- reg: physical base address of the controller and length of memory mapped > - region. > - > -Example: GRF and PMUGRF of RK3399 SoCs > - > - pmugrf: syscon@ff320000 { > - compatible = "rockchip,rk3399-pmugrf", "syscon"; > - reg = <0x0 0xff320000 0x0 0x1000>; > - }; > - > - grf: syscon@ff770000 { > - compatible = "rockchip,rk3399-grf", "syscon"; > - reg = <0x0 0xff770000 0x0 0x10000>; > - }; > diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > new file mode 100644 > index 000000000..264e2e5ff > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml > @@ -0,0 +1,262 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/rockchip/grf.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip General Register Files (GRF) > + > +maintainers: > + - Heiko Stuebner > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - rockchip,rk3066-grf > + - rockchip,rk3188-grf > + - rockchip,rk3288-sgrf > + - rockchip,rv1108-pmugrf > + - rockchip,rv1108-usbgrf > + - const: syscon > + - items: > + - enum: > + - rockchip,px30-grf > + - rockchip,px30-pmugrf > + - rockchip,px30-usb2phy-grf > + - rockchip,rk3036-grf > + - rockchip,rk3228-grf > + - rockchip,rk3288-grf > + - rockchip,rk3308-core-grf > + - rockchip,rk3308-detect-grf > + - rockchip,rk3308-grf > + - rockchip,rk3328-grf > + - rockchip,rk3328-usb2phy-grf > + - rockchip,rk3368-grf > + - rockchip,rk3368-pmugrf > + - rockchip,rk3399-grf > + - rockchip,rk3399-pmugrf > + - rockchip,rk3568-grf > + - rockchip,rk3568-pmugrf > + - rockchip,rv1108-grf > + - const: syscon > + - const: simple-mfd > + > + reg: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + > +unevaluatedProperties: false > + > +allOf: > + - $ref: "#/$defs/px30-grf" > + - $ref: "#/$defs/rk3288-grf" > + - $ref: "#/$defs/rk3328-grf" > + - $ref: "#/$defs/rk3399-grf" > + - $ref: "#/$defs/reboot" > + - $ref: "#/$defs/usb2" > + - $ref: "#/$defs/domains" > + > +$defs: There's not really any point to using '$defs' unless you have 2 or more references to them. > + px30-grf: > + if: > + properties: > + compatible: > + contains: > + const: rockchip,px30-grf > + > + then: > + properties: > + lvds: > + description: > + Documentation/devicetree/bindings/display/rockchip/rockchip-lvds.txt > + > + rk3288-grf: > + if: > + properties: > + compatible: > + contains: > + const: rockchip,rk3288-grf > + > + then: > + properties: > + edp-phy: > + description: > + Documentation/devicetree/bindings/phy/rockchip-dp-phy.txt > + > + usbphy: > + description: > + Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt > + > + rk3328-grf: > + if: > + properties: > + compatible: > + contains: > + const: rockchip,rk3328-grf > + > + then: > + properties: > + gpio: > + type: object > + > + $ref: "/schemas/gpio/rockchip,rk3328-grf-gpio.yaml#" > + > + unevaluatedProperties: false > + > + power-controller: > + type: object > + > + $ref: "/schemas/power/rockchip,power-controller.yaml#" > + > + unevaluatedProperties: false > + > + rk3399-grf: > + if: > + properties: > + compatible: > + contains: > + const: rockchip,rk3399-grf > + > + then: > + properties: > + mipi-dphy-rx0: > + type: object > + > + $ref: "/schemas/phy/rockchip-mipi-dphy-rx0.yaml#" > + > + unevaluatedProperties: false > + > + pcie-phy: > + description: > + Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt > + > + patternProperties: > + "phy@[0-9a-f]+$": > + description: > + Documentation/devicetree/bindings/phy/rockchip-emmc-phy.txt > + > + reboot: > + if: > + properties: > + compatible: > + contains: > + enum: > + - rockchip,px30-pmugrf > + - rockchip,rk3036-grf > + - rockchip,rk3308-grf > + - rockchip,rk3368-pmugrf > + > + then: > + properties: > + reboot-mode: > + type: object > + > + $ref: "/schemas/power/reset/syscon-reboot-mode.yaml#" > + > + unevaluatedProperties: false > + > + usb2: > + if: > + properties: > + compatible: > + contains: > + enum: > + - rockchip,px30-usb2phy-grf > + - rockchip,rk3228-grf > + - rockchip,rk3328-usb2phy-grf > + - rockchip,rk3399-grf > + - rockchip,rv1108-grf > + > + then: > + properties: > + "#address-cells": > + const: 1 > + > + "#size-cells": > + const: 1 > + > + required: > + - "#address-cells" > + - "#size-cells" > + > + patternProperties: > + "usb2-phy@[0-9a-f]+$": > + type: object > + > + $ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#" > + > + unevaluatedProperties: false > + > + domains: > + if: > + properties: > + compatible: > + contains: > + enum: > + - rockchip,px30-pmugrf > + - rockchip,px30-grf > + - rockchip,rk3228-grf > + - rockchip,rk3288-grf > + - rockchip,rk3328-grf > + - rockchip,rk3368-pmugrf > + - rockchip,rk3368-grf > + - rockchip,rk3399-pmugrf > + - rockchip,rk3399-grf > + > + then: > + properties: > + io-domains: > + description: > + Documentation/devicetree/bindings/power/rockchip-io-domain.txt > + > +examples: > + - | > + #include > + #include > + #include > + grf: syscon@ff770000 { > + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; > + reg = <0xff770000 0x10000>; > + #address-cells = <1>; > + #size-cells = <1>; > + > + mipi_dphy_rx0: mipi-dphy-rx0 { > + compatible = "rockchip,rk3399-mipi-dphy-rx0"; > + clocks = <&cru SCLK_MIPIDPHY_REF>, > + <&cru SCLK_DPHY_RX0_CFG>, > + <&cru PCLK_VIO_GRF>; > + clock-names = "dphy-ref", "dphy-cfg", "grf"; > + power-domains = <&power RK3399_PD_VIO>; > + #phy-cells = <0>; > + }; > + > + u2phy0: usb2-phy@e450 { > + compatible = "rockchip,rk3399-usb2phy"; > + reg = <0xe450 0x10>; > + clocks = <&cru SCLK_USB2PHY0_REF>; > + clock-names = "phyclk"; > + #clock-cells = <0>; > + clock-output-names = "clk_usbphy0_480m"; > + #phy-cells = <0>; > + > + u2phy0_host: host-port { > + #phy-cells = <0>; > + interrupts = ; > + interrupt-names = "linestate"; > + }; > + > + u2phy0_otg: otg-port { > + #phy-cells = <0>; > + interrupts = , > + , > + ; > + interrupt-names = "otg-bvalid", "otg-id", > + "linestate"; > + }; > + }; > + }; > -- > 2.11.0 >