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From:   Rob Herring <robh@kernel.org>
Date:   Mon, 10 May 2021 15:29:21 -0500
Message-ID: <CAL_JsqKeVoBL6cn6CGUW17jnf8B+4aHKeyRdceaGCiKzsUsZwg@mail.gmail.com>
Subject: Re: [PATCH V6] perf: Reset the dirty counter to prevent the leak for
 an RDPMC task
To:     Peter Zijlstra <peterz@infradead.org>
Cc:     "Liang, Kan" <kan.liang@linux.intel.com>,
        Ingo Molnar <mingo@redhat.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Andi Kleen <ak@linux.intel.com>,
        Arnaldo Carvalho de Melo <acme@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Andy Lutomirski <luto@amacapital.net>,
        Stephane Eranian <eranian@google.com>,
        Namhyung Kim <namhyung@kernel.org>
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On Mon, May 10, 2021 at 2:18 PM Peter Zijlstra <peterz@infradead.org> wrote:
>
> On Thu, Apr 22, 2021 at 11:25:52AM -0700, kan.liang@linux.intel.com wrote:
>
> > - Add a new method check_leakage() to check and clear dirty counters
> >   to prevent potential leakage.
>
> I really dislike adding spurious callbacks, also because indirect calls
> are teh suck, but also because it pollutes the interface so.
>
> That said, I'm not sure I actually like the below any better :/
>
> ---
>
>  arch/x86/events/core.c       | 58 +++++++++++++++++++++++++++++++++++++++++---
>  arch/x86/events/perf_event.h |  1 +
>  include/linux/perf_event.h   |  2 ++
>  kernel/events/core.c         |  7 +++++-
>  4 files changed, 63 insertions(+), 5 deletions(-)
>
> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
> index 8e509325c2c3..e650c4ab603a 100644
> --- a/arch/x86/events/core.c
> +++ b/arch/x86/events/core.c
> @@ -740,21 +740,26 @@ void x86_pmu_enable_all(int added)
>         }
>  }
>
> -static inline int is_x86_event(struct perf_event *event)
> +static inline bool is_x86_pmu(struct pmu *_pmu)
>  {
>         int i;
>
>         if (!is_hybrid())
> -               return event->pmu == &pmu;
> +               return _pmu == &pmu;
>
>         for (i = 0; i < x86_pmu.num_hybrid_pmus; i++) {
> -               if (event->pmu == &x86_pmu.hybrid_pmu[i].pmu)
> +               if (_pmu == &x86_pmu.hybrid_pmu[i].pmu)
>                         return true;
>         }
>
>         return false;
>  }

[...]

> +bool arch_perf_needs_sched_in(struct pmu *pmu)
> +{
> +       if (!READ_ONCE(x86_pmu.attr_rdpmc))
> +               return false;
> +
> +       if (!is_x86_pmu(pmu))
> +               return  false;
> +
> +       return current->mm && atomic_read(&current->mm->context.perf_rdpmc_allowed);
>  }

Why add an arch hook for something that clearly looks to be per PMU?
Couldn't we add another atomic/flag for calling sched_task() that is
per PMU rather than per CPU. With that, I think I can avoid a hook in
switch_mm() and keep every self contained in the Arm PMU driver.

Rob