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From:   Peng Fan <peng.fan@nxp.com>
To:     Abel Vesa <abel.vesa@nxp.com>,
        "Peng Fan (OSS)" <peng.fan@oss.nxp.com>
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        Jacky Bai <ping.bai@nxp.com>,
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Subject: RE: [PATCH V4 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
Thread-Topic: [PATCH V4 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
Thread-Index: AQHXRU134jm/FqpaL06N/5HWMg6916rceJSAgAECR2A=
Date:   Tue, 11 May 2021 01:14:11 +0000
Message-ID: <DB6PR0402MB27601005EFA105AB35CAD85488539@DB6PR0402MB2760.eurprd04.prod.outlook.com>
References: <20210510040704.14997-1-peng.fan@oss.nxp.com>
 <20210510040704.14997-5-peng.fan@oss.nxp.com>
 <20210510094813.vye2yjdspuqkiocd@fsr-ub1664-175>
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> Subject: Re: [PATCH V4 4/4] soc: imx: Add blk-ctl driver for i.MX8MM
>=20
> On 21-05-10 12:07:04, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The i.MX8MM SoC has dispmix BLK-CTL and vpumix BLK-CTL, so we add
> that
> > support in this driver.
> >
> > Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  drivers/soc/imx/Makefile         |   2 +-
> >  drivers/soc/imx/blk-ctl-imx8mm.c | 138
> > +++++++++++++++++++++++++++++++
> >  2 files changed, 139 insertions(+), 1 deletion(-)  create mode 100644
> > drivers/soc/imx/blk-ctl-imx8mm.c
> >
> > diff --git a/drivers/soc/imx/Makefile b/drivers/soc/imx/Makefile index
> > d3d2b49a386c..c260b962f495 100644
> > --- a/drivers/soc/imx/Makefile
> > +++ b/drivers/soc/imx/Makefile
> > @@ -4,4 +4,4 @@ obj-$(CONFIG_ARCH_MXC) +=3D soc-imx.o  endif
> >  obj-$(CONFIG_HAVE_IMX_GPC) +=3D gpc.o
> >  obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) +=3D gpcv2.o
> > -obj-$(CONFIG_SOC_IMX8M) +=3D soc-imx8m.o blk-ctl.o
> > +obj-$(CONFIG_SOC_IMX8M) +=3D soc-imx8m.o blk-ctl.o blk-ctl-imx8mm.o
> > diff --git a/drivers/soc/imx/blk-ctl-imx8mm.c
> > b/drivers/soc/imx/blk-ctl-imx8mm.c
> > new file mode 100644
> > index 000000000000..5ca8d6c52917
> > --- /dev/null
> > +++ b/drivers/soc/imx/blk-ctl-imx8mm.c
> > @@ -0,0 +1,138 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright 2021 NXP
> > + */
> > +
> > +#include <dt-bindings/clock/imx8mm-clock.h>
> > +#include <dt-bindings/power/imx8mm-power.h>
> > +#include <linux/clk.h>
> > +#include <linux/err.h>
> > +#include <linux/io.h>
> > +#include <linux/module.h>
> > +#include <linux/mutex.h>
> > +#include <linux/of_address.h>
> > +#include <linux/of_device.h>
> > +#include <linux/platform_device.h>
> > +#include <linux/slab.h>
> > +#include <linux/types.h>
> > +#include <linux/pm_domain.h>
> > +#include <linux/regmap.h>
> > +
> > +#include "blk-ctl.h"
> > +
> > +#define MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN			BIT(6)
> > +#define MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN			BIT(5)
> > +#define MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN			BIT(4)
> > +#define MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN
> 	BIT(3)
> > +#define MEDIA_BLK_CSI_BRIDGE_SFT_EN				GENMASK(2,
> 0)
> > +
> > +#define MEDIA_BLK_BUS_PD_MASK					BIT(12)
> > +#define MEDIA_BLK_MIPI_CSI_PD_MASK				GENMASK(11,
> 10)
> > +#define MEDIA_BLK_MIPI_DSI_PD_MASK				GENMASK(9,
> 8)
> > +#define MEDIA_BLK_LCDIF_PD_MASK					GENMASK(7,
> 6)
> > +#define MEDIA_BLK_CSI_BRIDGE_PD_MASK				GENMASK(5,
> 0)
> > +
> > +static struct imx_blk_ctl_hw imx8mm_dispmix_blk_ctl_pds[] =3D {
> > +	IMX_BLK_CTL_PD("CSI_BRIDGE", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_CSI_BRIDGE, 0x4,
> > +		       MEDIA_BLK_CSI_BRIDGE_PD_MASK, 0,
> MEDIA_BLK_CSI_BRIDGE_SFT_EN,
> > +		       IMX_BLK_CTL_PD_RESET),
> > +	IMX_BLK_CTL_PD("LCDIF", "dispmix",
> IMX8MM_BLK_CTL_PD_DISPMIX_LCDIF, 0x4,
> > +		       MEDIA_BLK_LCDIF_PD_MASK, -1, -1, 0),
> > +	IMX_BLK_CTL_PD("MIPI_DSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_DSI, 0x4,
> > +		       MEDIA_BLK_MIPI_DSI_PD_MASK, 0,
> MEDIA_BLK_MIPI_DSI_I_PRESETN_SFT_EN,
> > +		       IMX_BLK_CTL_PD_RESET),
> > +	IMX_BLK_CTL_PD("MIPI_CSI", "mipi",
> IMX8MM_BLK_CTL_PD_DISPMIX_MIPI_CSI, 0x4,
> > +		       MEDIA_BLK_MIPI_CSI_PD_MASK, 0,
> > +		       MEDIA_BLK_MIPI_CSI_I_PRESETN_SFT_EN |
> MEDIA_BLK_CAMERA_PIXEL_RESET_N_SFT_EN,
> > +		       IMX_BLK_CTL_PD_RESET)
> > +};
> > +
> > +static struct imx_blk_ctl_hw imx8mm_vpumix_blk_ctl_pds[] =3D {
> > +	IMX_BLK_CTL_PD("VPU_BLK_CTL_G2", "vpu-g2",
> IMX8MM_BLK_CTL_PD_VPU_G2, 0x4,
> > +		       BIT(0), 0, BIT(0), IMX_BLK_CTL_PD_RESET),
> > +	IMX_BLK_CTL_PD("VPU_BLK_CTL_G1", "vpu-g1",
> IMX8MM_BLK_CTL_PD_VPU_G1, 0x4,
> > +		       BIT(1), 0, BIT(1), IMX_BLK_CTL_PD_RESET),
> > +	IMX_BLK_CTL_PD("VPU_BLK_CTL_H1", "vpu-h1",
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4,
> > +		       BIT(2), 0, BIT(2), IMX_BLK_CTL_PD_HANDSHAKE |
> > +IMX_BLK_CTL_PD_RESET), };
> > +
> > +static const struct regmap_config imx8mm_blk_ctl_regmap_config =3D {
> > +	.reg_bits		=3D 32,
> > +	.reg_stride		=3D 4,
> > +	.val_bits		=3D 32,
> > +	.max_register		=3D 0x30,
> > +	.fast_io		=3D true,
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data
> imx8mm_vpumix_blk_ctl_dev_data =3D {
> > +	.pds =3D imx8mm_vpumix_blk_ctl_pds,
> > +	.pds_num =3D ARRAY_SIZE(imx8mm_vpumix_blk_ctl_pds),
> > +	.hw_hsk =3D IMX_BLK_CTL_PD(NULL, NULL,
> IMX8MM_BLK_CTL_PD_VPU_H1, 0x4, BIT(2), 0, BIT(2),
> > +				 IMX_BLK_CTL_PD_HANDSHAKE),
> > +	.config =3D imx8mm_blk_ctl_regmap_config,
> > +	.active_pd_names =3D (char*[]){"vpumix", "g1", "g2", "h1"},
> > +	.num_active_pd =3D 4,
> > +};
> > +
> > +static const struct imx_blk_ctl_dev_data
> imx8mm_dispmix_blk_ctl_dev_data =3D {
> > +	.pds =3D imx8mm_dispmix_blk_ctl_pds,
> > +	.pds_num =3D ARRAY_SIZE(imx8mm_dispmix_blk_ctl_pds),
> > +	.hw_hsk =3D IMX_BLK_CTL_PD(NULL, NULL, -1, 0x4,
> MEDIA_BLK_BUS_PD_MASK, 0,
> > +				 MEDIA_BLK_BUS_RSTN_BLK_SYNC_SFT_EN,
> > +				 IMX_BLK_CTL_PD_HANDSHAKE |
> IMX_BLK_CTL_PD_RESET),
> > +	.config =3D imx8mm_blk_ctl_regmap_config,
> > +	.active_pd_names =3D (char*[]){"dispmix", "mipi"},
> > +	.num_active_pd =3D 2,
> > +};
> > +
> > +static int imx8mm_blk_ctl_probe(struct platform_device *pdev) {
> > +	struct device *dev =3D &pdev->dev;
> > +	const struct imx_blk_ctl_dev_data *dev_data =3D
> of_device_get_match_data(dev);
> > +	struct regmap *regmap;
> > +	struct imx_blk_ctl *ctl;
> > +	void __iomem *base;
> > +
> > +	ctl =3D devm_kzalloc(dev, sizeof(*ctl), GFP_KERNEL);
> > +	if (!ctl)
> > +		return -ENOMEM;
> > +
> > +	base =3D devm_platform_ioremap_resource(pdev, 0);
> > +	if (IS_ERR(base))
> > +		return PTR_ERR(base);
> > +
> > +	regmap =3D devm_regmap_init_mmio(dev, base, &dev_data->config);
> > +	if (IS_ERR(regmap))
> > +		return PTR_ERR(regmap);
> > +
> > +	ctl->regmap =3D regmap;
> > +	ctl->dev =3D dev;
> > +	ctl->power_count =3D 0;
> > +	mutex_init(&ctl->lock);
> > +
> > +	ctl->num_clks =3D devm_clk_bulk_get_all(dev, &ctl->clks);
> > +	if (ctl->num_clks < 0)
> > +		return ctl->num_clks;
> > +
> > +	dev_set_drvdata(dev, ctl);
> > +	ctl->dev_data =3D dev_data;
> > +
> > +	return imx_blk_ctl_register(dev);
> > +}
>=20
> Nitpick:
>=20
> Pretty sure all the other platforms will have a similar probe function.
> So maybe we can move this into the generic and call it imx8_blk_ctl_regis=
ter
> and pass on the PDs, dev data and regmap_config.
>=20
> We could also do this later on when i.MX8MP variant will be done.

Let me do this later, I have started i.MX8MP part, and will use a generic
probe function.

Thanks,
Peng.

>=20
> > +
> > +static const struct of_device_id imx_blk_ctl_of_match[] =3D {
> > +	{ .compatible =3D "fsl,imx8mm-vpumix-blk-ctl", .data =3D
> &imx8mm_vpumix_blk_ctl_dev_data },
> > +	{ .compatible =3D "fsl,imx8mm-dispmix-blk-ctl", .data =3D
> &imx8mm_dispmix_blk_ctl_dev_data },
> > +	{ /* Sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, imx_blk_ctl_of_match);
> > +
> > +static struct platform_driver imx_blk_ctl_driver =3D {
> > +	.probe =3D imx8mm_blk_ctl_probe,
> > +	.driver =3D {
> > +		.name =3D "imx8mm-blk-ctl",
> > +		.of_match_table =3D of_match_ptr(imx_blk_ctl_of_match),
> > +		.pm =3D &imx_blk_ctl_pm_ops,
> > +	},
> > +};
> > +module_platform_driver(imx_blk_ctl_driver);
> > --
> > 2.30.0
> >