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[23.128.96.18]) by mx.google.com with ESMTP id q15si22024824jaj.2.2021.05.11.02.57.37; Tue, 11 May 2021 02:57:48 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="x6C0X/mu"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231266AbhEKJ4y (ORCPT + 99 others); Tue, 11 May 2021 05:56:54 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:43800 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231245AbhEKJ4x (ORCPT ); Tue, 11 May 2021 05:56:53 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 14B9tfuC111120; Tue, 11 May 2021 04:55:41 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1620726941; bh=MCuBDSA7fc5SHmGrOTAvYKl2d1dNicT14OoYgJkByAg=; h=Subject:CC:References:From:Date:In-Reply-To; b=x6C0X/mum0n1FVkGGitro7N689dBn6+gny6bdwkBeTeNW5dufDhtnS+QQSsxmU/5n ilvImQCgDoI0DnC9HlSiT+moIV/1cj1+oc/PxwQBN+U0WyGEy08lDYzHAF67IJX8rO 5WzsDqe8q90zObfkPxvQyNU7Xd3YMAP0+RWkWGvE= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 14B9tfIL031463 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 11 May 2021 04:55:41 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2; Tue, 11 May 2021 04:55:41 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2176.2 via Frontend Transport; Tue, 11 May 2021 04:55:41 -0500 Received: from [10.250.235.117] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 14B9tZI6064034; Tue, 11 May 2021 04:55:36 -0500 Subject: Re: [PATCH v2] arm64: dts: ti: k3-am65: Add support for UHS-I modes in MMCSD1 subsystem CC: Vignesh Raghavendra , Lokesh Vutla , Kishon Vijay Abraham I , Jan Kiszka , Nishanth Menon , Tero Kristo , Rob Herring , , , References: <20210511095339.16268-1-a-govindraju@ti.com> From: Aswath Govindraju Message-ID: <238b6d95-ae9d-2a9c-ae8c-97dcc712ee83@ti.com> Date: Tue, 11 May 2021 15:25:33 +0530 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20210511095339.16268-1-a-govindraju@ti.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 To: unlisted-recipients:; (no To-header on input) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/05/21 3:23 pm, Aswath Govindraju wrote: > UHS-I speed modes are supported in AM65 S.R. 2.0 SoC[1]. > > Add support by removing the no-1-8-v tag and including the voltage > regulator device tree nodes for power cycling. > > However, the 4 bit interface of AM65 SR 1.0 cannot be supported at 3.3 V or > 1.8 V because of erratas i2025 and i2026 [2]. As the SD card is the primary > boot mode for development usecases, continue to enable SD card and disable > UHS-I modes in it to minimize any ageing issues happening because of > erratas. > > k3-am6528-iot2050-basic and k3-am6548-iot2050-advanced boards use S.R. 1.0 > version of AM65 SoC. Therefore, add no-1-8-v in sdhci1 device tree nodes > for these boards. > > [1] - https://www.ti.com/lit/ug/spruid7e/spruid7e.pdf, section 12.3.6.1.1 > [2] - https://www.ti.com/lit/er/sprz452e/sprz452e.pdf > > Signed-off-by: Aswath Govindraju > --- changes since v1: - added no-1-8-v tag in sdhci1 dt nodes of k3-am6528-iot2050-basic and k3-am6548-iot2050-advanced boards as they use S.R.1.0 version AM65 SoC. Thanks, Aswath > arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 1 - > .../boot/dts/ti/k3-am6528-iot2050-basic.dts | 4 +++ > .../arm64/boot/dts/ti/k3-am654-base-board.dts | 33 +++++++++++++++++++ > .../dts/ti/k3-am6548-iot2050-advanced.dts | 4 +++ > 4 files changed, 41 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > index cb340d1b401f..632f32fce4a1 100644 > --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi > @@ -301,7 +301,6 @@ > ti,otap-del-sel = <0x2>; > ti,trm-icp = <0x8>; > dma-coherent; > - no-1-8-v; > }; > > scm_conf: scm-conf@100000 { > diff --git a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts > index 4f7e3f2a6265..485266960d5f 100644 > --- a/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts > +++ b/arch/arm64/boot/dts/ti/k3-am6528-iot2050-basic.dts > @@ -40,6 +40,10 @@ > status = "disabled"; > }; > > +&sdhci1 { > + no-1-8-v; > +}; > + > &main_pmx0 { > main_uart0_pins_default: main-uart0-pins-default { > pinctrl-single,pins = < > diff --git a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > index 9e87fb313a54..51c594b4dddb 100644 > --- a/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > +++ b/arch/arm64/boot/dts/ti/k3-am654-base-board.dts > @@ -91,6 +91,38 @@ > #clock-cells = <0>; > clock-frequency = <24000000>; > }; > + > + evm_12v0: fixedregulator-evm12v0 { > + /* main supply */ > + compatible = "regulator-fixed"; > + regulator-name = "evm_12v0"; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + regulator-always-on; > + regulator-boot-on; > + }; > + > + vcc3v3_io: fixedregulator-vcc3v3io { > + /* Output of TPS54334 */ > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_io"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&evm_12v0>; > + }; > + > + vdd_mmc1_sd: fixedregulator-sd { > + compatible = "regulator-fixed"; > + regulator-name = "vdd_mmc1_sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + enable-active-high; > + vin-supply = <&vcc3v3_io>; > + gpio = <&pca9554 4 GPIO_ACTIVE_HIGH>; > + }; > }; > > &wkup_pmx0 { > @@ -350,6 +382,7 @@ > * disable sdhci1 > */ > &sdhci1 { > + vmmc-supply = <&vdd_mmc1_sd>; > pinctrl-names = "default"; > pinctrl-0 = <&main_mmc1_pins_default>; > ti,driver-strength-ohm = <50>; > diff --git a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts > index ec9617c13cdb..3643a19b5f33 100644 > --- a/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts > +++ b/arch/arm64/boot/dts/ti/k3-am6548-iot2050-advanced.dts > @@ -55,6 +55,10 @@ > disable-wp; > }; > > +&sdhci1 { > + no-1-8-v; > +}; > + > &main_uart0 { > status = "disabled"; > }; >