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Tue, 11 May 2021 16:35:22 +0000 Received: from DM6PR12MB3834.namprd12.prod.outlook.com ([fe80::ddb4:2cbb:4589:f039]) by DM6PR12MB3834.namprd12.prod.outlook.com ([fe80::ddb4:2cbb:4589:f039%4]) with mapi id 15.20.4108.031; Tue, 11 May 2021 16:35:22 +0000 Date: Tue, 11 May 2021 13:35:21 -0300 From: Jason Gunthorpe To: Jacob Pan Cc: LKML , iommu@lists.linux-foundation.org, Joerg Roedel , Lu Baolu , Jean-Philippe Brucker , Christoph Hellwig , Yi Liu , Raj Ashok , "Tian, Kevin" , Dave Jiang , wangzhou1@hisilicon.com, zhangfei.gao@linaro.org, vkoul@kernel.org, David Woodhouse Subject: Re: [PATCH v4 1/2] iommu/sva: Tighten SVA bind API with explicit flags Message-ID: <20210511163521.GN1002214@nvidia.com> References: <1620653108-44901-1-git-send-email-jacob.jun.pan@linux.intel.com> <1620653108-44901-2-git-send-email-jacob.jun.pan@linux.intel.com> <20210510233749.GG1002214@nvidia.com> <20210510203145.086835cc@jacob-builder> <20210511114848.GK1002214@nvidia.com> <20210511091452.721e9a03@jacob-builder> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData: =?us-ascii?Q?xSBW7fBfFSlPftBoe1rNO5HLF9XqCD9lJGoazh+OHW++5fUcVCzpjH2FBHq4?= =?us-ascii?Q?Mm+xpub9MNpODHjODBDSiUnFPNG4Jue632O1LLsG1V49R6utz+aXT1BasuG4?= =?us-ascii?Q?pJQrntUt4fWbjXe4p0dk5/2nQNdXN6ZKW8MLTLPCXWU/NV4iiT3amPpyEu29?= =?us-ascii?Q?7aDP02Mi22mNONlFQYao9rPSXAQWX3Rp1CD/9klXWdSNPlE51hScCejXJvVM?= =?us-ascii?Q?vBfTt2Cg9LPDcWbHLHzCuuy8hMAjvzh/rIcsbggkfgGijgTpDUYq3C25B/d3?= =?us-ascii?Q?UytMtp1TEyXlcFu6Kd7VLwxcDC4QIfLz3Vlp71Hv05DoMH0cF02ljfDSN27+?= =?us-ascii?Q?08QUY9+hBfFZ8lxInJaMV9sCzg5l7IUMvj6lHz7UDDvIwndmW9VippJJL6f6?= =?us-ascii?Q?ib+B2aJ89tkmP6hEV4RR3LU9ircuByF2GeUQW0xpYu5j4b+g7ETp57/0Bx2E?= =?us-ascii?Q?pqctVyRKI3olQjse/g1tsnby5Cn/Wx0ZkGe9HQz7uhHeLjDJaS9wcB2Cu451?= =?us-ascii?Q?SbS+xTHMUX771Hz9sKw7je6QGu7r4/JngEj1Tvrf8IM9wqsxiCmmCyMaZoHE?= =?us-ascii?Q?CAnyi4pwq0wKvj9OHzRl0iNqI62PN2a+5CemnDGFHiqvO6zBiDFBvGvzvnRk?= =?us-ascii?Q?4qdWLCVsNSbi/rkpTrpI04JTACWCvyavYJodH73eOHMKnjNvP+/ZRL7ATJfY?= =?us-ascii?Q?XpTflG1upefI0CHIjfhuCmQ/YxuVb4rtonW8SoBpJ7HE2ZjAF3BQcdk92yVO?= =?us-ascii?Q?4gnkW0MAbgGCgJzHZBHmBIeiuZPdYwP0GjOzCy5KWlwcMRwwMiKdfN2ogjhe?= =?us-ascii?Q?rLzJ726MgJla4Pa9NeTgO+4S7bkq/brbQHpAgc7hzyL51JtEzIaiiK1A9yGp?= =?us-ascii?Q?+ZpG5dvV+IZWFJ2ryPBmV9nQWO4F1T8VtNqVRTgfrLzBFeDAM0MUL5IVvrLL?= =?us-ascii?Q?PRYRfhHgE41RfCpexRAdYVtPXgMn2Wf5nk6A7Z6iHcjZvSkaes2JZbO6ZyqH?= =?us-ascii?Q?knFAozwjnjzMGwG0M14Vr1nvZIdtMLFR0TahDkZy2kk+VJmzge0xvDZEdPlj?= =?us-ascii?Q?GGiFJgeMmrvOjg0sHdtfWN6Q9h3/w3WPMwjac/r1XUPapmca/cOjdmcD95Ay?= =?us-ascii?Q?bJRvi2D8CUiQPc3Z9VFE/gKwtQVoXqJNRTvbaeEODG5EgJ1i3Ev6V0DYK6Fo?= =?us-ascii?Q?10JT9hV2IgbCkznAGCpr64CJOGUB/KVI///ZUoUNalybe71FMCDMgXJ1NJcl?= =?us-ascii?Q?zoJGB7N1xPDA8v/KMGgbZyFd46fbzZR6+60p9xZa3CUjEXIWz15crZ3uIl8e?= =?us-ascii?Q?vF9KoDQ3bR3TgZn637xJh6NF?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 290f0070-c1eb-468c-3f80-08d9149ac5d5 X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3834.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2021 16:35:22.8360 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NztL9+2lECG0MzzC1wITde0xUEd9JCY5DbNBI0ox3rJdkUk6moVxGmR1X8m0rJDX X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB2860 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, May 11, 2021 at 09:14:52AM -0700, Jacob Pan wrote: > > Honestly, I'm not convinced we should have "kernel SVA" at all.. Why > > does IDXD use normal DMA on the RID for kernel controlled accesses? > > Using SVA simplifies the work submission, there is no need to do map/unmap. > Just bind PASID with init_mm, then submit work directly either with ENQCMDS > (supervisor version of ENQCMD) to a shared workqueue or put the supervisor > PASID in the descriptor for dedicated workqueue. That is not OK, protable drivers in Linux have to sue dma map/unmap calls to manage cache coherence. PASID does not opt out of any of that. I dislike this whole idea a lot. A single driver should not opt itself out of IOMMU based security "just because" Jason